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8.0 - 12.0 years
20 - 27 Lacs
noida
Hybrid
Job description Hands on experience with any of the FPGA families from AMD, Intel Knowledge of FPGA architecture, IO features, IO Constraints Thorough Knowledge of digital design fundamentals Thorough Knowledge of VHDL Static timing analysis, timing optimization, timing constraints, clock domain crossing Communication protocols including I2C, SPI, UART, MDIO Experience in FPGA bring up activities Experience in debugging of RTL issues at functional level or system level Working knowledge in transceiver or SerDes based protocol design. Awareness of PCI-Express protocol will be an advantage Requirements Strong programming skill in Verilog, VHDL and a solid understanding of digital design, stati...
Posted 2 months ago
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