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2.0 - 4.0 years
0 Lacs
bengaluru, karnataka, india
On-site
Job Title: ASIC Verification- Sr. Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an accomplished verification engineer with a passion for excellence and a track record of delivering robust, high-quality IP solutions. You thrive in a fast-paced, dynamic environment and are excited by the opportunity to work on ...
Posted 2 weeks ago
3.0 - 8.0 years
8 - 18 Lacs
hyderabad, chennai, bengaluru
Work from Office
Role & responsibilities- Must have exposure to SoC Verification Programming Languages- C, C++, System Verilog, UVM Protocols- PCIe, AMBA, Ahb, Apb, Axi Notice Period- Immediate to 30 Days
Posted 2 weeks ago
1.0 - 4.0 years
1 - 4 Lacs
hyderabad
Work from Office
Senior Analyst Global Finance Operations How is this team contributing to vision of Providence The Senior Analyst for Global Finance Operations plays a crucial role in performing the work to maintain and ensure accurate and timely financial reporting This position includes performing operations, meeting SLA and targets, data analysis, report generation, and collaboration with various stakeholders to support the operation, Key Responsibilities Work closely with the global stakeholders to process and ensure accurate recording (Accruals, Amortization, Allocation, Reclass, etc), reporting, consolidation and analyzing reports pertaining to General Ledger, Cash & Treasury, Investment, Fixed assets...
Posted 2 weeks ago
4.0 - 8.0 years
0 Lacs
pune, maharashtra
On-site
As an FPGA Design Engineer, you will be responsible for utilizing your expertise in VHDL/Verilog/System Verilog, RTL design, and FPGA design tools to develop FPGA solutions. Your responsibilities will include managing the complete FPGA development flow, from logic design to validation, using tools such as Lattice/Altera FPGA families. You will have the opportunity to work on debugging and troubleshooting FPGA implementations on hardware boards, as well as gaining experience with communication protocols and bus interfaces. To qualify for this role, you should hold a Bachelors/Masters degree in Electrical Engineering, Computer Science, or a related field. Your proven experience in FPGA develop...
Posted 2 weeks ago
2.0 - 4.0 years
0 Lacs
bengaluru, karnataka, india
On-site
At NVIDIA, we build groundbreaking products for the following sectors: Gaming, Deep Learning, Automotive, Embedded and High Performance Computing. As a member of the GPU/SoC Foundations Developer Tools team, you will be advancing the state of art of our low-level profiling library which aids developers in analyzing and optimizing the performance of their systems/applications. We are seeking a motivated Software Engineer to contribute to the performance triage development and co-design of our software in collaboration with our Hardware Architecture team. Join our team and gain exciting opportunities to work hands-on at every layer of NVIDIA's world-class technology. What you'll be doing: Work...
Posted 2 weeks ago
3.0 - 8.0 years
6 - 18 Lacs
bengaluru
Work from Office
Responsibilities: * Collaborate with cross-functional teams on design verification strategies * Develop UVM testbenches for SOCs using System Verilog and PCIe protocols
Posted 3 weeks ago
4.0 - 12.0 years
0 Lacs
bengaluru, karnataka, india
On-site
Lead Design Verification Engineer Bangalore We are looking for an experienced Lead Design Verification Engineer (412 yrs) to join our semiconductor team. Youll lead SoC/ASIC/IP verification using SystemVerilog, UVM, SVA, and drive test planning, coverage, regressions, and debug. ???? Must-have: Strong expertise in protocols (PCIe, DDR, USB, AMBA, MIPI, CXL), EDA tools (VCS, Xcelium, Questa), scripting (Python/Perl/Tcl), and low-power/CDC/formal verification. ???? Bonus: Experience with emulation/GLS, lint, DFT awareness, and leadership/mentoring. ???? Location: Bangalore, India ? Experience: 412 years ???? Apply now or share your profile at [HIDDEN TEXT] Show more Show less
Posted 3 weeks ago
12.0 - 17.0 years
3 - 11 Lacs
bengaluru, karnataka, india
On-site
What You ll Be Doing: Making architectural decisions on test bench design. Writing verification plans and specifications. Implementing test bench infrastructure and writing test cases. Implementing a coverage-driven methodology. Leading technical aspects of verification projects. Collaborating with international teams of architects, designers, and verification engineers. The Impact You Will Have: Enhancing the robustness and reliability of IP cores used in critical applications. Driving innovation in verification methodologies and tools. Ensuring high-quality deliverables through rigorous verification processes. Improving productivity, performance, and throughput of verification solutions. C...
Posted 3 weeks ago
4.0 - 10.0 years
4 - 10 Lacs
bengaluru, karnataka, india
On-site
You are a seasoned verification engineer with a passion for cutting-edge technology With a BSEE in Electrical Engineering and over 5 years of relevant experience, or an MSEE with over 4 years, you bring a wealth of knowledge in developing System Verilog based test environments, implementing test plans, and extracting verification metrics You possess strong HVL coding skills and hands-on experience with industry-standard simulators such as VCS, NC, or MTI, and waveform-based debugging tools Your familiarity with verification methodologies like VMM, OVM, or UVM is solid, and you have a deep understanding of protocols such as AMBA, SD/eMMC, MIPI-I3C/UFS/Unipro, Ethernet, DDR, PCIe, and USB Your...
Posted 3 weeks ago
3.0 - 8.0 years
8 - 13 Lacs
noida, hyderabad, bengaluru
Work from Office
Skills/Experience: Create emulation models from RTL / Netlist. Expertise in mapping designs to Zebu/Palladium/Haps emulation, improving model performance. Knowledge of the Palladium flow and experience in migrating design on Palladium. Good knowledge of runtime and debug skills. Identifying signals and taking wave dumps on palladium platforms and analyse the failures. Exposure to ARM/ARC cores and its architecture Exposure to AMBA bus architectures like AXI/AHB/APB Exposure to bug tracking tools like Jira and version control tools like Github, Bitbucket, GIT Exposure to Flash(NAND) and HDD(Hard disk) like storage technologies. Experience with Palladium like emulation platforms(Veloce or Zebu...
Posted 3 weeks ago
20.0 - 27.0 years
27 - 32 Lacs
hyderabad
Work from Office
Hiring : ASIC Engineering Director : Experience : 20+Years Our game-changing AI solutions revolutionize what people and businesses can achieve. Ara inference processors combined with our SDK deliver unrivaled deep learning performance at the edge to accelerate and optimize real-time decision making where every millisecond is critical, and power efficiency is a must. embed high-performance AI into edge devices to create a smarter, safer, and more enjoyable world. Edge AI is on the brink of a boom, and Kinara is looking forward to playing a significant role in it. KEY EXPERTISE : - Seasoned ASIC Front End leader with 20 years of cross domain experience ranging from architecture, uArch, IP/Sub-...
Posted 3 weeks ago
10.0 - 14.0 years
10 - 20 Lacs
bengaluru
Work from Office
We are seeking a highly experienced Staff Design Engineer with 10+ years of expertise in RTL design and digital signal processing for our Bengaluru location (max 30 days notice period). The ideal candidate will be responsible for designing, developing, and integrating custom DSP components such as filters, FFTs, and control logic for Aevas advanced 4-D Lidar processing chip across ASIC and FPGA platforms. The role involves creating micro-architecture specifications, writing and validating SystemVerilog RTL code, and ensuring designs meet stringent performance, low-power, and robustness requirements. The engineer will collaborate with architects, verification, and system software teams to ach...
Posted 4 weeks ago
10.0 - 14.0 years
7 - 12 Lacs
bengaluru
Work from Office
We are seeking a highly experienced Staff Design Engineer with 10+ years of expertise in RTL design and digital signal processing for our Bengaluru location (max 30 days notice period). The ideal candidate will be responsible for designing, developing, and integrating custom DSP components such as filters, FFTs, and control logic for Aevas advanced 4-D Lidar processing chip across ASIC and FPGA platforms. The role involves creating micro-architecture specifications, writing and validating SystemVerilog RTL code, and ensuring designs meet stringent performance, low-power, and robustness requirements. The engineer will collaborate with architects, verification, and system software teams to ach...
Posted 4 weeks ago
10.0 - 15.0 years
6 - 9 Lacs
bengaluru
Work from Office
We are seeking a highly experienced Staff Design Engineer with 10+ years of expertise in RTL design and digital signal processing for our Bengaluru location (max 30 days notice period). The ideal candidate will be responsible for designing, developing, and integrating custom DSP components such as filters, FFTs, and control logic for Aevas advanced 4-D Lidar processing chip across ASIC and FPGA platforms. The role involves creating micro-architecture specifications, writing and validating SystemVerilog RTL code, and ensuring designs meet stringent performance, low-power, and robustness requirements. The engineer will collaborate with architects, verification, and system software teams to ach...
Posted 4 weeks ago
0.0 years
0 Lacs
hyderabad, telangana, india
On-site
1. Strong coding with Verilog and SystemVerilog 2. Good knowledge of AHB,AXI, AMBA protocol, exp in Ethernet 3. Many experiences with sequence creation, functional cover groups and assertion coding. 4. Strong C/C++ software development experiences 5. Be familiar with scripting language, such as Perl, C shell, Makefile, Ruby. Show more Show less
Posted 4 weeks ago
4.0 - 9.0 years
10 - 20 Lacs
hyderabad, bengaluru
Work from Office
Job Description We are looking for an experienced Design Verification Engineer to join our team and contribute to the verification of complex SoC/ASIC designs. The ideal candidate will have strong expertise in verification methodologies, testbench development, and debugging. Key Responsibilities: Develop and implement verification plans, environments, and testbenches using SystemVerilog/UVM. Write and execute test cases for functional, regression, and coverage-driven verification. Perform debugging and root cause analysis for design and verification issues. Collaborate with RTL design, architecture, and validation teams to ensure quality deliverables. Analyze functional coverage metrics and ...
Posted 4 weeks ago
15.0 - 17.0 years
0 Lacs
Bengaluru, Karnataka, India
On-site
Principal Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: A highly-skilled ASIC Digital Verification Engineer with a passion for developing functional verification solutions for RTL based IP Cores. You are experienced in handling complex protocols and thrive in a collaborative international environment. Wi...
Posted 1 month ago
2.0 - 6.0 years
0 Lacs
karnataka
On-site
You should have a strong understanding of Design & Verification methodologies related to either Times or Untimed SW Models, RTL IP, VIPs, and UVM Env. It is essential to be familiar with verification tools such as Simulator and Synthesis. Proficiency in C/C++, System Verilog, UVM, SystemC, and RTL is required. Knowledge of standard protocol interfaces like AMBA, Automotive, PCIe, and USB would be beneficial. Strong written and verbal communication skills are necessary, along with the ability to work effectively both independently and as part of a team. A self-motivated attitude and a collaborative approach to teamwork are also important attributes for this role.,
Posted 1 month ago
8.0 - 12.0 years
0 Lacs
karnataka
On-site
As a Senior Design/Verification - Subsystems Lead at Synopsys, you will be part of the Digital IP Subsystem team in Bangalore/Hyderabad, India, contributing to cutting-edge technological work in the field of integrated circuits. Your expertise will be crucial in driving the design and verification efforts for complex IP/Subsystem/SoC blocks. Design Lead: In the role of RTL Design Lead, you will be responsible for ensuring bug-free RTL from requirements or specifications. Your experience in multiple tape-outs and driving the design effort for complex blocks will be instrumental in the success of our projects. Verification Lead: As a Verification Lead, your role will involve catching bugs and ...
Posted 1 month ago
8.0 - 12.0 years
0 Lacs
karnataka
On-site
As a Senior Design/Verification - Subsystems Lead at Synopsys, you will be part of the Digital IP Subsystem team that has experienced significant growth. We are seeking talented engineers to join us in Bangalore/Hyderabad, India and be a part of our exciting journey in the SysMoore era. **Design Lead:** In the role of an RTL Design lead, you will experience the thrill of achieving bug-free RTL from requirements or specifications. Your expertise in driving the design effort for complex IP/Subsystem/SoC blocks, with a track record of multiple tape-outs, will be invaluable in delivering high-quality results. **Verification Lead:** As a Verification lead, you will enjoy the challenge of identify...
Posted 1 month ago
5.0 - 9.0 years
0 Lacs
delhi
On-site
HCL Technologies is a next-generation global technology company that helps enterprises reimagine their businesses for the digital age. With a strong foundation built on four decades of innovation, a world-renowned management philosophy, and a relentless focus on customer relationships, we pride ourselves on our culture of invention and risk-taking. HCL is committed to diversity, social responsibility, sustainability, and education initiatives, exemplified by our worldwide network of R&D facilities and co-innovation labs. With over 187,000+ Ideapreneurs across 50 countries, we deliver holistic services across industry verticals to leading enterprises, including 250 of the Fortune 500 and 650 ...
Posted 1 month ago
3.0 - 8.0 years
0 - 2 Lacs
Hyderabad, Bengaluru
Work from Office
Position : ASIC Design Verification Engineer Requirements : 2Years to 15Years experience in SystemVerilog/UVM-based verification for IP/SoC Skills in assertions, formal verification and emulation Experience with high-speed interfaces (PCIe, DDR, Ethernet), scripting (Python, TCL, Perl) and working across cross-functional teams Responsibilities : Full verification closurefrom test planning and testbench development to formal, emulation-based verification and ensuring first-pass silicon success Role & responsibilities Preferred candidate profile
Posted 1 month ago
2.0 - 7.0 years
0 - 1 Lacs
Hyderabad, Bengaluru
Work from Office
Core Technical Skills : SystemVerilog / UVM testbench and coverage methodologies Constraint-random verification, simulation and debug flow Formal verification techniques (e.g. Jasper, VC Formal) Scripting languages: Python, TCL, Perl, Shell Experience with high-speed protocols (PCIe, DDR, Ethernet) and emulation tools Resume & Interview Prep Advice : Highlight projects involving ASIC/SoC verification, testbench implementation, coverage closure using UVM/SystemVerilog Reddit+15Reddit+15Meta Careers+15Indeed+8Atos Jobs+8Indeed+8Reddit+1Indeed+1Reddit+2Meta Careers+2Reddit+2Reddit+2Reddit+2Reddit+2 Showcase contributions in debugging RTL, developing functional coverage models, and scripting aut...
Posted 1 month ago
2.0 - 7.0 years
12 - 16 Lacs
Bengaluru
Work from Office
Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Good knowledge on AMBA protocols (CHI/AXI/AHB) Knowledge of ARM architecture be an added advantage Exposure to low power methodology with understanding of UPF Execute verification plans, regression enabling for all features and, debug of the test failures Hands-on experience of GLS and timing simulations Exposure to Formal verification Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application...
Posted 1 month ago
3.0 - 8.0 years
18 - 22 Lacs
Bengaluru
Work from Office
Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: 3 to 15 years of work experience in ASIC/SoC Design Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience in Verilog/System-Verilog is a must. knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Hands on e...
Posted 1 month ago
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