The candidate will be responsible for implementing the place and route of design blocks including floor planning, placement, clock tree building, routing, timing optimizations, DRC, LVS fixing, IR drop analysis, Formal verification, power intent checks etc. The candidate will also be responsible for block level physical design closure in terms of timing, power, DRC/LVS etc. REQUIREMENTS: 4-9 years of experience in ASIC Physical Design Have good Hands on entire physical design process from floorplan till GDS generation Good Exposure to Physical Verification Process Have hands-on experience in latest sub-micron technologies below 7nm Hands –on experience in leading PnR tools Synopsys ICC/ICC2 Experience in low power designs and handling congestion or timing critical tiles will be preferred Should be a quick learner and have good attention to detail Experience in ECO implementation preferred Scripting skills in Perl/Tcl/Python etc Must have good communication & problem-solving skills. Should be able to handle PnR tasks with minimal supervision Location :: Hyderabad & Bangalore *Adds on advantage atleast one or two projects has worked in AMD projects in his / her carier. Thanks, P Mohankrishna, Mohankrishna.p@Altcognitosystems.com Show more Show less

Job Description The candidate will be responsible for implementing the place and route of design blocks including floorplanning, placement, clock tree building, routing, timing optimizations, DRC, LVS fixing, IR drop analysis, Formal verification, power intent checks etc. The candidate will also be responsible for block-level physical design closure in terms of timing, power, DRC/LVS, etc. Requirements 3-8years of experience in ASIC Physical Design Have good knowledge of the entire physical design process from floorplan to GDSII generation Good Exposure to Physical Verification Process Have hands-on experience in the latest sub-micron technologies below 10 nm Hands–on experience in leading PnR tools Synopsys ICC/ICC2 Experience in low power designs and handling congestion or timing critical tiles will be preferred Should be a quick learner and have good attention to detail Experience in ECO implementation preferred Scripting skills in Perl/Tcl/Python etc Must have good communication & problem-solving skills. Should be able to handle PnR tasks with minimal supervision Show more Show less

Company Description Altcognito systems is a Established service comkany in VLSI and working with Good clients. Role Description This is a full-time on-site role for a Physical Design Engineer located in Hyderabad. The Physical Design Engineer will be responsible for performing physical design tasks, including floorplanning, placement, clock tree synthesis, routing, and physical verification. Qualifications 7+years of experience in Physical Design (PNR, Floorplan, STA & Lowernodes) Experience in Logic Design and Circuit Design Excellent analytical and problem-solving skills Strong communication and teamwork abilities Familiarity with industry-standard EDA tools is a plus Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field

Job Description The candidate will be responsible for implementing the place and route of design blocks including floorplanning, placement, clock tree building, routing, timing optimizations, DRC, LVS fixing, IR drop analysis, Formal verification, power intent checks etc. The candidate will also be responsible for block-level physical design closure in terms of timing, power, DRC/LVS, etc. Requirements 3-8years of experience in ASIC Physical Design Have good knowledge of the entire physical design process from floorplan to GDSII generation Good Exposure to Physical Verification Process Have hands-on experience in the latest sub-micron technologies below 10 nm Hands–on experience in leading PnR tools Synopsys ICC/ICC2 Experience in low power designs and handling congestion or timing critical tiles will be preferred Should be a quick learner and have good attention to detail Experience in ECO implementation preferred Scripting skills in Perl/Tcl/Python etc Must have good communication & problem-solving skills. Should be able to handle PnR tasks with minimal supervision