158 Ahb Jobs - Page 5

About The Role About The Role :The world is transforming - and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower peoples digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful.Your responsibilities will include but not limited to: Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development. Qualifications You must possess the below minimum qualifications to be initially considered for this position Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidatesMinimum QualificationsCandidate will have a Bachelors degree in Computer Engineering/ Computer Science or Electrical Engineering with 6+ years of experience -OR- a Masters degree in Computer Engineering Computer Science or Electrical Engineering with 4+ years of experience with C and Object Oriented Software design including algorithms and data structures. Knowledge of Software development practices and quality standards. Experience with Unix Windows based SW development tools. Experience developing bus functional models for unit level verification or Verification IP development. Preferred Qualifications:- Proficiency in System C SystemVerilog UVM and ESL modeling methodologies Proficiency in HW design and verification methodologies Working knowledge of highspeed HW protocols eg PCIe DDR Inside this Business Group The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel's transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies"”spanning software, processors, storage, I/O, and networking solutions"”that fuel cloud, communications, enterprise, and government data centers around the world.

About The Role Conducts verification of IP and/or SoC microarchitecture using formal verification tools, methodologies, and technologies based on model checking and equivalence checking algorithms. Creates comprehensive formal verification test and coverage plans including definition of formal verification scope, strategy, and techniques. Creates abstraction models for convergence on the design, carves out the right boundaries for the design, and tracks, verifies, and applies abstraction techniques. Develops formal proofs to implement the verification plan, reviews the completed proofs, and develops new formal verification methodologies. Performs convergence on design by creating formal verification methodology, abstraction, and simulation techniques. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications: 5+ years of experience in the verification of IPs Hands on experience in applying formal property verification for Ips signoff at least for 3 years Hands on experience in resolving convergence issues using FV on multiplies Managing and Guiding juniors in their verification task, Stakeholder management. Preferred Qualifications: Expertise in FV verification planning and strategies Good understanding of FV tools and capabilities Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel's products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore's Law and groundbreaking innovations. DEG is Intel's engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

As a Formal verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Develop skills in IBM Formal verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5 -10 years of relevant industry experience Proven experience in Formal/Functional Verification - Demonstrated execution experience of verification of logic blocks verification. Knowledge of formal methodology, Knowledge of HDLs (Verilog, VHDL, SV), Good programming skills in python, processor core u-arch skills Exposure in developing testbench environment, debugging and triaging fails. Good communication skills and be able to work effectively in a global team environment. Drive verification coverage closure, lead verification team. Drive complex scenarios, participate in High level design discussions. Track record in leading teams. Preferred technical and professional experience Writing test plans, building random / exhaustive formal verification environment, functional and coverage analysis and debug. Good understanding of the Server System

Java Developer + Cloud Experience Experience in SQL/PLSQL in any database Technologies like Sybase, DB2, DynamoDB. Implemented Docker-Microservices, RESTful API Architecture. Good understanding of Core AWS Services including AWS EC2, S3, ALB, NATGW, EFS, Lambda, APIGW. Ability to create AWS Infrastructure Design including DR at AWS Infra Level. Knowledge in Infra Provisioning using Terraform in AWS. JD Link :

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Function :Camera Design Lead/Staff Candidate will be responsible for design/developing next generation SoCs sub systems for mobile phone camera . Candidate will be working on ASIC based on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI development cycle like architecture, micro architecture, Synthesis/PD interaction and design convergence. Skills/Experience Solid experience in digital front end design for ASICsSolid Expertise in RTL microarchitecture and design coding in Verilog/SV for complex designs with multiple clock and power domainsExpertise with various bus protocols like AHB, AXI and NOC designs Experience in low power design methodology and clock domain crossing designsUnderstanding of full RTL to GDS flow to interact with DFT and PD teams Experience in Tools like Spyglass Lint/CDC checks and waiver creationExperience in formal verification with Cadence LEC Experience in mobile Multimedia/Camera design is a plus DSP /ISP knowledge is a plus. Working knowledge of timing closure is a plusExpertise in Perl, TCL language is a plusExpertise in post-Si debug is a plus Good documentation skillsAbility to create unit level test plan General Should possess good communication skills to ensure effective interaction with Engineering Management and mentor group members. Should be self-motivated and good team working attitude and need to function with little direct guidance or supervision Responsibilities Digital design and development (RTL) working in close collaboration with Multi-site leadsDeveloping the micro architecture and implementing the design using Verilog/SV. Integrate and deliver complex subsystem to SoCDesign and implement defined tasks independently. Work in close coordination with Systems, Verification, SoC team , SW team, PD & DFT teams to get the goals completed.Analyze reports/waivers or run various tools :Spyglass, 0-in, DC-Compiler, Prime time, synthesis, simulation etc Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required . Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Preferred Qualifications 6-9 years of experience in SoC design Educational Requirements:6+ years of experience with a Bachelor"™s/ Master"™s degree in Electrical engineering

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Digital Verification Engineer for IPs, ASICs and Chipsets used in Qualcomm Snapdragon power solutions. Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create job s, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age and this is where you come in. Digital Verification Engineer for for Mixed-Signals IPs, ASICs and Chipsets used in Qualcomm Snapdragon power solutions. IPs include telemetry ADCs, 100W+ charging (Quick Charge 5.0), 5G power (mmW, envelope tracking, high performance low noise oscillators etc") and high efficiency power management (DC-DC charge pumps, bucks and linear regulators). * Work includes partnering with international teams in all stages of development from system definition to high-volume (100M+) OEM launches. * Digital Verification aspects include all stages of the verification process from test planning, UVM-compliant test-bench architecture, constrained-random stimulus creation, score-boarding and coverage closure. * Work includes verification of digital and mixed-signals IPs and exposure to analog behavioral models is a plus. * Work includes debugging of complex embedded systems including SOCs, firmware, embedded sequencers. * Position includes IP or chip DV ownership including task planning and project risk mitigation. * Work in a dynamic team environment with aggressive schedule towards metrics-based high quality target. Preferred Qualifications Strong troubleshooting skills across embedded systems disciplines (digital RTL, Firmware, analog behavioral models) Strong communication and organizational skills Strong process-oriented mindset. Expert-level System Verilog Programming Advanced UVM/SV (Universal Verification Methodology using System Verilog) Python or Perl scripting Minimum Qualifications Bachelor's degree in Science, Engineering, or related field. 8+ years ASIC design, verification, or related work experience Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Additional About The Role : Minimum Qualifications Bachelor's degree in Science, Engineering or closely related field Experience with digital design and RTL development, Experience with front end EDA tools such as Synopsys Next Generation tools, Conformal LEC, Synopsys Formality and Synopsys PrimeTime Preferred Qualifications Knowledge and experience of graphics design and development Proficient in Perl, TCL and shell scripting Excellent interpersonal and team skills yet able to work independently and able to problem solve complex, unique and detailed issues Be Familiar with The latest EDA tools for synthesis, formal verification, timing analysis and physical design

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Exp : 3 "“ 5 Yrs Position : Senior or Lead Expertise : Power fundamentals Good knowledge of PTPX Good knowledge of CLP Knowledge of design verification, RTL coding, synthesis, and physical design Protocol knowledge of , DDR, CHI, Cache, computer organization, bus protocol, Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: The role generally entails a mixture of: Ownership of a piece of the test bench Planning & execution of feature additions and mode re-enablement on particular variants Bug fixes Debug of regression signatures Developing/Deploying new tools for performance validation Performance monitor and profiler development and deployment Workload specific simulations on the emulator Following skillset is required: Strong Python, C++ skills Reading Specs and developing test plans Monitors, scoreboards, sequencers, and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved Candidates should be comfortable checking our builds, navigating big test benches, analyzing coverage, and adding or enabling extra debug, Must be willing to dig into fail and understand what is happening 6 months - 1 Year of industry experiences in the following areas:- Basic of digital design concepts, fifo etc Basic understanding of DDR is a plus Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite Understanding of multi-core ARMv8 CPU architecture, coherency protocols and virtualization Minimum requirement is Bachelor of Engineering however preferred is Masters of Engineering in Computer Science or Computer Engineering Candidate must possess right analytical skills, debug oriented mindset and must be open to discuss , deep dive, collate and present the design and environment understanding . Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm WLAN HW team in Bangalore is responsible for developing and delivering best in class WLAN/WiFi solutions which are setting benchmark in wireless industry. In this role of WLAN Verification Engineer, you will be verifying the PHY Sub-System from both TX and RX perspective. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. The responsibilities will majorly include : Understanding of WLAN PHY TX and RX design paths, Algorithms that control the various aspects of wireless systems Develop test plan to verify WiFi Standards including 11BE, sequences and design components. Own end to end DV tasks from coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches Successful candidate will be required to collaborate with worldwide design, silicon, and architecture teams to achieve all project goals. Hence, we are looking for candidates with strong communication skills. 8+ years industry experience with below skillset : Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology Experience in formal / static verification methodologies will be a plus Good understanding of WiFi Standards is a plus Experience with GLS, and scripting languages such as Perl, Python is a plus Education Requirements BE/BTech/ME/MTech/MS Communication Engineering and/or Electronics, VLSI from reputed university preferably with distinction

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. Ownership of System Memory Management [SMMU] IP test bench and collaterals for the next generation System-on-chip (SoC) for smartphones, tablets and other product categories. System Memory Management Unit does virtual to physical address translation, dynamic allocation and access control of DDR memory, designed as per ARM SMMU architecture spec. Job responsibilities include Ownership of DV test bench and other associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage) Develop test plan and test cases to cover design feature set, follow up with stake holders on code coverage, functional coverage closure at different levels of test bench Work closely with System Architects, Design, emulation teams on failure debugs, code/functional coverage closure Debug of regression signatures and identifying bug fixes Developing/Deploying scripts/tools for validation (Certitude, VC Formal, Fishtail) Debug and root cause post silicon issues in collaboration with Design, SW and test teams Work with SoC level performance modeling team on latency, bandwidth analysis Required skillset include Strong debugging, Analytical and problem-solving skills Expertise on UVM, System Verilog coding Knowledgeable about ARM bus protocols, Virtual Memory concepts, SoC system architecture Experience in developing Monitors, Scoreboards, Sequencers that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved Post-si bring-up and HW-SW debug experience would be a plus. Knowledge & exposure to silicon debug tool chains would be an added advantage Communication and collaboration skills to work with a large world-wide design organization Desired skillset includes Experience in designs optimized for low power - Dynamic clock gating, Logic/ Memory power collapse Proficiency in any of the Scripting languages (Python or Perl)

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Overview Qualcomm WLAN HW team in Bangalore is responsible for developing and delivering best in class WLAN/WiFi solutions which are setting benchmark in wireless industry. In this role of WLAN Verification Engineer, you will be verifying the PHY Sub-System from both TX and RX perspective. The responsibilities will majorly include : Understanding of WLAN PHY TX and RX design paths, Algorithms that control the various aspects of wireless systems Develop test plan to verify WiFi Standards including 11BE, sequences and design components. Own end to end DV tasks from coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches Successful candidate will be required to collaborate with worldwide design, silicon, and architecture teams to achieve all project goals. Hence, we are looking for candidates with strong communication skills . 3+ years industry experience with below skillset : Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology Experience in formal / static verification methodologies will be a plus Good understanding of WiFi Standards is a plus Experience with GLS, and scripting languages such as Perl, Python is a plus Education Requirements BE/BTech/ME/MTech/MS Communication Engineering and/or Electronics, VLSI from reputed university preferably with distinction Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in Logic design /micro-architecture / RTL coding is a must . Must have hands on experience with SoC design and integration for SoCs. Experience in Verilog/System-Verilog is a must . Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required . Hands on experience in Multi Clock designs, Asynchronous interface is a must . Experience creating pad ring and working with the chip level floorplan team is an added advantage Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required . Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 3-6 yrs of experience

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for complex SoCs. Experience in Verilog/System-Verilog is a must. knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required. Understanding of constraint development and timing closure is a plus. Experience in Synthesis / Understanding of timing concepts is a plus. Experience creating padring and working with the chip level floorplan team is an added advantage. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

About The Role : Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements. Defines and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm to graphics microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification. Qualifications Minimum Qualifications: BE/Btech in Electronics or Computer Engineering or any STEM related degree with 6+ year of relevant experience in front end verification at unit/block/IP level or Master's Degree in Electronics or Computer Engineering or any STEM related degree with 5+ years of relevant experience in front end verification at unit/block/IP level Test Bench bring-up at unit/block/IP level and strong programming skills in System Verilog, OVM or UVM. Basic knowledge/Experience on End to End Val cycle, starting from Test Plan till coverage closures/val sign-off. Must be able to work individually with minimal dependency/inputs and should be able to help juniors. Experience with industry standard frontend design and verification flows, tools, methodology Preferred Qualifications: GPU Verification will be a plus Prefer understanding of Graphics architecture. Expertise with RTL verification and validation microarchitecture using Verilog, System Verilog Experience with coverage driven verification testbench development functional modelling and test writing. Experience with scripting shell, PERL, any other language. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Looking for 4+ yrs of design verification Engineers with below skills Developed verification methodology and test plan for new design Good knowledge on the verification flows, SV and UVM Perform RTL code coverage and functional coverage, formal analysis Be responsible for defining the verification strategy and plan for the development Develop coverage-driven verification test plans Knowledge on assertion development and coverage improvement Write test specifications (plans) and create directed and random test cases Good debugging skill

Grounds up verification environment development using SV/ UVM is a must5+ yrs Bangalore/ Pune One of the Serdes of high speed protocols like PCIe or USB 3 or MIPI Testplanning, AMS Setup, Experience in wreal, RNM, Verilog A VCS Primesim AMS and Primesim XA tool lExperience in wreal, RNM, Verilog A, exp in System Verilog and UVM

About The Role : Conducts verification of IP and/or SoC microarchitecture using formal verification tools, methodologies, and technologies based on model checking and equivalence checking algorithms. Creates comprehensive formal verification test and coverage plans including definition of formal verification scope, strategy, and techniques. Creates abstraction models for convergence on the design, carves out the right boundaries for the design, and tracks, verifies, and applies abstraction techniques. Develops formal proofs to implement the verification plan, reviews the completed proofs, and develops new formal verification methodologies. Performs convergence on design by creating formal verification methodology, abstraction, and simulation techniques. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Understands the binary decision diagram (BDD) and data flow graph (DFG) for data paths and resolves the BDD complexity on arithmetic. Applies understanding of modeling architecture to simplify and model the problem and uses tools to formally prove protocols and architectures. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications: Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related STEM degree plus 10+ years of industry experience, OR Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related STEM degree plus 8+ years of industry experience The years of experience mentioned above must focus on formal verification Preferred Qualifications: Knowledge of GPU Formal verification experience in at least one of these areas:Arbitration logic, low power design, memory controller, transaction router/bridge. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

About The Role : Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications: Bachelor's degree in electrical engineering or computer engineering with 4 to 9 years of experience or a master's degree in electrical engineering or computer engineering. 3+ years of experience in 5 or more of the following: Test Bench bring-up at SoC and strong programming skills in System Verilog, OVM and UVM. Test Plan development experience. Enabling regressions, maintaining QoV (quality of validation) with good functional/code/other coverage metrics. Familiarity with both simulation and emulation environments. Strong CPU/GPU architecture understanding. RTL Debugging module level or soc level system simulation failures. Building emulation models, enabling content Monitoring and improve existing simulation environments and simulation efficiency. Experience with Debugging and ACM domain will be a plus. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

About The Role : Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage. Maintains and improves existing functional verification infrastructure and methodology. Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum (must haves) Bachelor's degree in electrical engineering or computer engineering with 3 to 9 years of experience or a master's degree in electrical engineering or computer engineering. 3+ years of experience in 5 or more of the following: Test Bench bring-up at SoC and strong programming skills in System Verilog, OVM and UVM. Test Plan development experience. Enabling regressions, maintaining QoV (quality of validation) with good functional/code/other coverage metrics. Familiarity with both simulation and emulation environments. Strong CPU/GPU architecture understanding. RTL Debugging module level or soc level system simulation failures. Building emulation models, enabling content Working with Validation Engineers and central CAD teams to support and maintain verification requirements in terms of Automation and tool flow support. Coordinating with Val team on CAD Requirement with support CAD, IT and Engineering Compute Teams. Act as focal point between design and tool vendors for issues and feature enhancements. Training/Supporting Validation Engineers in CAD tool flow and Infrastructure Monitoring and improve existing simulation environments and simulation efficiency. Experience with Power Management and memory domain will be a plus. Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm WLAN HW team in Bangalore is responsible for developing and delivering best in class WLAN/WiFi solutions which are setting benchmark in wireless industry. In this role of WLAN Verification Engineer, you will be verifying the PHY Sub-System from both TX and RX perspective. The responsibilities will majorly include : Understanding of WLAN PHY TX and RX design paths, Algorithms that control the various aspects of wireless systems Develop test plan to verify WiFi Standards including 11BE, sequences and design components. Own end to end DV tasks from coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches Successful candidate will be required to collaborate with worldwide design, silicon, and architecture teams to achieve all project goals. Hence, we are looking for candidates with strong communication skills. 8+ years industry experience with below skillset : Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology Experience in formal / static verification methodologies will be a plus Good understanding of WiFi Standards is a plus Experience with GLS, and scripting languages such as Perl, Python is a plus Education Requirements BE/BTech/ME/MTech/MS Communication Engineering and/or Electronics, VLSI from reputed university preferably with distinction Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants :Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies :Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Job Overview Qualcomm WLAN HW team in Bangalore is responsible for developing and delivering best in class WLAN/WiFi solutions which are setting benchmark in wireless industry. In this role of WLAN Verification Engineer, you will be verifying the PHY Sub-System from both TX and RX perspective. The responsibilities will majorly include : Understanding of WLAN PHY TX and RX design paths, Algorithms that control the various aspects of wireless systems Develop test plan to verify WiFi Standards including 11BE, sequences and design components. Own end to end DV tasks from coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches Successful candidate will be required to collaborate with worldwide design, silicon, and architecture teams to achieve all project goals. Hence, we are looking for candidates with strong communication skills . 3+ years industry experience with below skillset : Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology Experience in formal / static verification methodologies will be a plus Good understanding of WiFi Standards is a plus Experience with GLS, and scripting languages such as Perl, Python is a plus Education Requirements BE/BTech/ME/MTech/MS Communication Engineering and/or Electronics, VLSI from reputed university preferably with distinction Applicants :Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies :Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Expertise in AMBA protocols (CHI/AXI/AHB) Excellent analytical skills, should have an experience of leading a team of 7-8 engineers Knowledge of ARM architecture be an added advantage Exposure to low power methodology with understanding of UPF Handson experience of GLS and timing simulations Exposure to Formal verification Self-driven and motivated to work in a high pressure environment Good at stakeholder management with good communication skills Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants :Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies :Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Additional About The Role : As verification engineer candidate will be responsible to manage UFS/Ethernet/PCIe/high speed IP verification at one or more SoC (System On Chip) during project work. Responsibilities : Understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design. Responsible to implement and analyze system Verilog assertion and coverage(code, toggle, functional) . Work alongside other members of the verification team to analyze, develop and execute verification test cases and able to provide relevant solution to issue. Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks. Adhere to quality standards and good test and verification practices. B.E/B. Tech/M.E/M. Tech in electronics with 5+ year experience in verification domain. Prior work experience on IP level or Soc level. Prior work on UFS (Universal Flash Storage),Ethernet and PCIe Protocol is desirable. Good understanding of processor based Soc level verification which includes native ,Verilog ,system Verilog and UVM mix environment. Hand on experience with verification tools such as VCS, waveform analyzer and third party VIP integration (such as Synopsys VIPs). Hands on experience in UVM. C/C++ ,System Verilog verification language. Good understanding of AXI-AMBA protocol variants. Can work with scripting language (shell, Makefile, Perl ) Strong understanding of design concepts and ASIC flow. Good problem solving , analytical and debugging skill is must. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. Applicants :Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies :Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.