386 Ahb Jobs - Page 4

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globa...

Job Description: Own RTL design of SoC-level or large subsystems from specification to silicon bring-up. Define and implement micro-architecture; write high-quality, synthesizable RTL in SystemVerilog/Verilog. Work closely with physical design teams for synthesis, timing closure, power, area optimization, DFT hooks, and ECOs. Drive block/subsystem integration and ensure seamless bring-up. Collaborate with verification teams to define test plans, assertions (SVA), and coverage goals. Support silicon validation, post-silicon debug, and drive closure of design bugs. Apply low-power design techniques (UPF/retention/isolation) and clock/reset design best practices. Work on standard bus protocols ...

Job Description: Were looking for a talented GLS (Gate-Level Simulation) Verification Engineer with strong experience in verifying complex SoCs using industry-standard tools and methodologies. Key Responsibilities & Skills: * Hands-on experience in GLS verification using Cadence Xcelium (mandatory) and Synopsys VCS. * Minimum 3 years of GLS experience with a solid understanding of gate-level verification flows. * Good understanding of physical design concepts relevant to GLS verification. * Strong knowledge of SystemVerilog and UVM-based testbench environments. * Experience with DDR or HBM PHY GLS will be an added advantage. * Basic understanding of SoC design and common bus protocols (AMBA,...

Job Description: Were looking for passionate Design Verification Engineers experienced in ASIC/SoC environments to contribute to high-performance PCIe, Networking, and IP Sub-System verification using industry-leading tools and methodologies. Key Responsibilities & Skills: Develop UVM-based testbenches and verification infrastructure for complex SoC and IP subsystems. Define and execute verification plans, coverage metrics, assertions, and regression strategies. Work on block-level and subsystem-level verification, ensuring reusable and scalable verification components. Collaborate with design, validation, and integration teams to ensure end-to-end functional quality. Strong knowledge of Sys...

Over 10 years of digital IP verification, advanced knowledge of ASIC/SOC Design flow and state of the art verification flow Proficient with Verilog, System Verilog and UVM. Good in UVM concepts and SystemVerilog language. (SVA, UVM scoreboard) Good in defining and developing UVM based verification frameworks, testbenches, processes and flows. Good in working in Linux and Windows environments. Familiarity with power aware simulation and firmware/hardware co-verification is a plus. Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus. Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.

Job Title: Design Verification Lead Location: Bangalore/Hyderabad Experience: 7+yrs Job Type: Full-time Industry: Semiconductors / VLSI / EDA Education: B.E./B.Tech or M.E./M.Tech in ECE/EEE or related field Job Description: We are looking for a passionate and experienced Design Verification Lead to drive the verification of complex SoC/IP designs. The ideal candidate will have deep expertise in functional verification methodologies and will be responsible for managing a team, defining verification strategies, and ensuring high-quality silicon delivery. Key Responsibilities: Own and lead verification activities for IP or SoC-level designs. Define and execute the verification plan, test strat...

In this role you will work on SoC/Sub-system level Emulation model development and design bring up on Zebu/Veloce HW platforms. Additionally, you will work closely with design, verification, validation, and SW teams to implement emulation testbench (XTORs, Speed Adaptors) and features required to develop content on emulation models. You would develop tests to qualify models. Key Skills 8-15 years of experience on SoC/Sub-system Emulation of multi-million gate and complex design with multiple clocks and power domains Experience in microcontroller architecture, Cores ARM A/M series, Interconnect (NIC, FlexNoC), Protocols like AHB, AXI, Memory (Flash, SRAM, DDR4/5), and memory controllers Exper...

As an RTL Engineer and Lead at Tessolve Semiconductors in Bangalore or Hyderabad, your role will involve RTL ASIC front end design with microarchitecture and Verilog coding. Your key responsibilities will include: - MAS development - RTL coding - Development of module and feature addition - Experience in medium complexity protocols - Familiarity with slow speed protocols like I2C, SPI, and UART - Knowledge of AMBA bus protocols (APB, AHB, AXI) - Experience in quality check flows such as linting and CDC For candidates with 8+ years of experience, the expectations will be higher, including: - Very strong RTL coding skills - Micro-architecture (uArch) development - Ownership and delivery of a s...

Would require to lead a V&V team in software validation as per aero & defence standards. Also, to lead the team for hardware and sub-system/system level testing.

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences - from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges -striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond....

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences - from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges -striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond....

Design Verification Experience : 3-5 years Location : Bangalore Following skill set is required: Candidate must have GLS hands on experience in ZD/PAGLS/SDF/Scan dump verification. Strong Debug, UVM, System Verilog and Digital Fundamentals Should be able to debug Netlist functional failure. Low Power Awar verification. Timing Simulation failure, setup and hold violation fundamentals. Scan dump verification. Understanding Specs and Standards and developing relevant test plans. Monitors, scoreboards, sequencers and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved. Good understanding of DDR families (LP/PC) and g...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Job Description Responsibilities will include To be strong designer who is able to work independent on one of the peripheral IPs come up with design and microarchitecture solutions guide/mentor juniors engage with external teams to drive/resolve cross team dependencies. Take complete responsibility of one or more project and drive that independently. Being able to make schedule estimates is a plus. People management experience is a plus Skills & Requirements needed 12+ years of work experience in ASIC IP cores design Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering K...

1. 12-18 Yrs in DV full-chip Exp. 2. Experience in SV/UVM testbench verification 3. Experience in ARM Coresight Debug subsystem 4. CSI/ DSI protocol expertise 5. Memory controller or cache expertise 6. Hands-on RAL model development (UVM) Required Candidate profile • EXP in verifying successful IPs, Subsystems & or SoCs. • PC System Architecture: PCI Express, USB, Ethernet, HyperTransport, DDR. • Standard bus/interface protocols (i.e. AXI, AHB, AMBA, OCP, PIPE).

Key Responsibilities Develop comprehensive verification plans and strategies for SoC and GLS components. Design, implement, and maintain reusable testbenches using SystemVerilog and UVM methodologies. Perform functional verification of AMBA bus protocols including AXI, AHB, and APB. Collaborate with RTL designers and architects to understand specifications and implement verification environments accordingly. Analyze verification results, debug issues, and provide timely resolutions to meet project timelines. Ensure coverage goals are met through simulation and formal verification techniques. (Optional) Participate in DSP module verification to enhance verification scope. Mentor junior engine...

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globa...

Understand the design specification , Memory and Memory BIST engine connection Develop skills in IBM BIST verification tools and apply them successfull Develop the verification environment and test benc Debug fails using waveform, trace tools and debug RTL cod Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Bachelor's Degree Required technical and professional expertise 4+ years of experience in Design Verification - demonstrated execution experience of verification of logic block Strong in DFT Verification - Demonstrated execution experience of verification of Memory BIS Knowledge of ver...

Responsible for designing ofseating system comodities - Seat structure, Mechanism, complete seat, OB/IB valance, Head rest, seat mounting brackets etc Extensive experience in using CATIA V5 & V6 (Generative Shape design, Part Design, Kinematics, Assembly & Drawing workbench) Create parametric 3D proposals in Catia maintaining editable history, define materials & create components as well as assembly drawings with drawing standards wherever applicable. Packaging studies, environment check, kinematics simulation (if applicable) for various mechanisms with good knowledge of all regulatory and functional requirements. Very good understanding of DFM and DFA Detailed Engineering knowledge of desig...

General Summary: Responsibilities will include To be strong designer who is able to work independent on one of the peripheral IPs come up with design and microarchitecture solutions guide/mentor juniors engage with external teams to drive/resolve cross team dependencies. Take complete responsibility of one or more project and drive that independently. Being able to make schedule estimates is a plus. People management experience is a plus Skills & Requirements needed 4-8 years of work experience in ASIC IP cores design Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering Knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and ...

General Summary: Responsibilities will include To be strong designer who is able to work independent on one of the peripheral IPs come up with design and microarchitecture solutions guide/mentor juniors engage with external teams to drive/resolve cross team dependencies. Take complete responsibility of one or more project and drive that independently. Being able to make schedule estimates is a plus. People management experience is a plus Skills & Requirements needed 8 to 10 years of work experience in ASIC IP cores design Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering Knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture ...

Your role as a Verification Engineer will involve developing comprehensive verification plans and strategies for SoC and GLS components. You will design, implement, and maintain reusable testbenches using SystemVerilog and UVM methodologies. Additionally, you will be responsible for performing functional verification of AMBA bus protocols including AXI, AHB, and APB. Collaboration with RTL designers and architects to understand specifications and implement verification environments accordingly is key. Analyzing verification results, debugging issues, and providing timely resolutions to meet project timelines will be part of your daily tasks. Ensuring coverage goals are met through simulation...

The Opportunity We're looking for the Wavemakers of tomorrow. Alphawave Semi enables tomorrow's future by accelerating the critical data communication at the heart of our digital world from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology. Alphawave Semi is expanding its team in PCIe IP de...

Key Responsibilities: Develop and execute verification test plans based on design specifications. Create constrained-random and directed testbenches using SystemVerilog/UVM. Develop functional coverage models and drive coverage closure. Debug simulation failures, analyze waveforms, and work with RTL designers to resolve issues. Perform block-level and/or SoC-level verification. Integrate and verify 3rd-party IPs and custom IPs in subsystem and full-chip environments. Collaborate with RTL, DFT, DV, firmware, and physical design teams. Run regression simulations and ensure verification quality through coverage metrics. Automate verification flows and improve efficiency using scripting language...

Technical Lead - Design Verification Experience: 8+ Years Location: Bengaluru We are seeking a highly skilled and experienced Senior Design Verification Engineer to join our SoC/ASIC verification team in Bangalore. The ideal candidate will have a deep understanding of the verification lifecycle, from test planning to coverage closure, and be able to independently drive complex verification tasks for IP, subsystem, or full-chip level designs. Key Responsibilities: Develop and execute test plans for IP/subsystem/full-chip level verification. Build and maintain constrained-random and directed testbenches using SystemVerilog and UVM. Drive functional coverage closure and ensure high-quality tape...

As an Individual Contributor in the IP / SS domain, your role involves driving roadmaps for the complete IP portfolio, focusing on logic design and architecting Complex IPs / Subsystems solutions. You will collaborate with a team of global experts to address design challenges and work on a wide spectrum of skills from high-level specifications to actual design implementation. **Key Responsibilities:** - Own and drive Roadmaps for complete IP / Subsystem domains portfolio within the global R&D team. - Perform benchmarks against industry players to ensure innovative features for customers. - Architect and Design complex IP and Subsystems for Automotive Self Driving Vehicles (ADAS), In-Vehicle ...