Software Development Engineer Accenture services Pvt Ltd

5.0 - 7.0 years

0 Lacs

Bengaluru, Karnataka, India

On-site

Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Physical Design Good to have skills : NA Minimum 5 Year(s) Of Experience Is Required Educational Qualification : 15 years full time education Summary: As a Software Development Engineer, you will engage in a dynamic work environment where you will analyze, design, code, and test various components of application code across multiple clients. Your typical day will involve collaborating with team members to ensure the successful implementation of software solutions, performing maintenance and enhancements, and contributing to the overall development process. You will be responsible for delivering high-quality code while adhering to project timelines and standards, ensuring that the applications meet the needs of the clients effectively. Roles & Responsibilities: Undertake block PD closure in advanced technology nodes viz. 7nm, 3nm, 2nm etc. Responsibilities include physical design implementation for multi-hierarchy low-power designs including physical-aware logic synthesis, floorplan, place & route, clock tree synthesis, routing, static timing analysis, IR Drop, EM, and physical verification. Support & resolve design and flow issues related to physical design implementation, identify potential solutions, and drive & implement methodology improvements. Professional & Technical Skills: - Must To Have Skills: Proficiency in Physical Design. - Strong understanding of digital circuit design and layout. - Experience with design verification and validation techniques. - Familiarity with industry-standard design tools and software. - Ability to troubleshoot and resolve design-related issues effectively. Proficiency in advanced synthesis, physical implementation & timing closure techniques to achieve aggressive low power, area, and timing goals. Experience in running physical-aware logic synthesis and achieving optimal synthesis QoR on low power designs. Knowledge of static timing analysis, defining timing constraints and exceptions, corners/voltage definitions. Experience working with EDA tools Redhawk/Voltus. Additional Information: - Bachelor&aposs degree in Electrical Engineering or Computer Science. 4-7 years experience in ASIC design flow usage & development. RTL2GDS experience on advanced technology nodes (7nm and below). Experience with low power implementation and signoff, power gating, multiple voltage rails, UPF knowledge. Experience with multi-clock and multi-power domain designs. Proficiency with ECO implementation for timing, functional and DFT modes. Experience in Block-level and Full-chip floor-planning and power grid planning. Experience in Block-level and Full-chip design implementation. Strong expertise in Python & TCL programming. In-depth experience working with EDA tools like Fusion Compiler, ICC2/Innovus, Primetime, Calibre. The candidate should have minimum 5 years of experience in Physical Design. - This position is based at our Bengaluru office. - A 15 years full time education is required. Show more Show less

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