ASIC SoC Design Verification New Dehli, India Engineering 64580 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SE NIOR SILICON DESIGN ENGINEER (AECG ASIC - SoC Design Verification Engineer) THE ROLE: The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s custom silicon/ASIC designs, resulting in no bugs in the final design. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES : Collaborate with the Arch, Design, Functional DV, Emulation, Platform Debug, etc teams to understand Architecture and verification asks Ability to come with detailed testplan based on the Arch specs Good understanding and exposure to SoC design and architecture 6+ years of Design Verification experience with strong Verilog, System Verilog, C and UVM/OVM knowledge Candidate should be able to develop Testbench. Thorough understanding of verification environments including need, methodology, stimulus, checkers, scoreboards, coverage aspects. Developing functional coverage & assertions. Own the DV sign-off and ensure a bug free design Work with the post-silicon team on debug support and to help root-cause any failures Have worked on wireless protocol design verification Bringing up Testbench/SoC verification environment. Good understanding of SoC RESET/CLOCK flow Exposure to DEBUG concepts such as JTAG etc Comfortable with VCS/Verdi and excellent debug skills Logical in thinking and ability to gel well within a team Good communication skills PREFERRED EXPERIENCE: Proficient in SoC/sub-system/IP level ASIC verification Proficient in debugging RTL code using simulation tools Experienced with Verilog, System Verilog, C, and C++ Worked on any High Speed Interface like PCIE/DDR/USB/Other, Good understanding of AXI/AHB/APB Bus protocol Prior knowledge of ARM/RISC Processor based designs verification and bring-up verification Developing UVM based verification frameworks and testbenches, processes and flows Good understanding and hands-on experience in the UVM concepts and SystemVerilog language Scripting language experience: Perl, Python, Makefile, shell preferred. #LI-SR4 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

IP Verification Bangalore, India Engineering 63839 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SMTS SILICON DESIGN ENGINEER THE ROLE: The candidate will get to work on the Verification of complex PLLs that are delivered to various AMD SoCs. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Verification of IP features : Feature Test plan creation, Verification of the IP in RTL, Gatesim and Analog Mixed Signal simulations. Create methodology-based (UVM) verification testbenches and components from scratch for various IP features. Quality deliverables through regressions Verification coverage: code-coverage, functional coverage, assertions, to achieve 100% verification completeness Reviews, and feedback to design/architecture teams. PREFERRED EXPERIENCE: Years of experience 9+ Required. Expertise in System Verilog, methodology based testbench architectures such as UVM, and System Verilog assertions (SVA) Expertise in code and functional coverage. Excellent Problem solving and debugging skills. Excellent Communication skills Strong digital design knowledge. Exposure to UPF based low power RTL verification Prior experience in PLL verification and Mixed signal verification methodology is highly desirable. Exposure to digital-analog co-simulations (cosims) is desirable. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-ST1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Strategic / Leadership Role - DFT Bangalore, India Engineering 64595 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ FELLOW SILICON DESIGN ENGINEER (DFT) THE ROLE: We are looking for a Fellow-level Engineer to join our team to develop world-class DFT architecture for EPYC Server products. In this role you will be engaged with the SoC Architects, Micro Architects, PD Engineers, Product Engineers, etc, to define and implement the DFT Architecture, guide/technically lead the DFT Team to ensure right pre-si verification is done for the DFT logic, and the highest level of Scan coverage is achieved to hit the product goals. You will also be responsible for driving innovation to continuously improve the execution and also drive TTR (Test Time Reduction) THE PERSON: You will possess very strong DFT knowledge and bring broad experience in with a strong, self-motivated work ethic and leadership qualities. KEY RESPONSIBILITIES: Work closely with the SoC Architecture and uArch teams to define the DFT architecture. Be the Tech Lead driving DFT RTL implementation, DFT functional and Scan capture timing closure, Scan/ATPG implementation to hit the product coverage goals, interactions with the Product Engineering team to ensure on-time and FirstTimeRight pattern delivery and silicon bring-up Drive the required pre-silicon reviews for RTL, DFT DV and ATPG to ensure clean silicon bring-up Collaborate with the Arch, Design, Functional DV, Emulation, Platform Debug, etc teams to comprehend and validate all the usage models Work with the post-silicon team on debug support and to help root-cause any failures Be upto date with the industry trends and bring-in the latest to the AMD products Work with DFT Tool Vendors and drive improvements based on our requirements REQUIREMENTS: 15+ years of in-depth DFT experience having driven multiple Tapeouts and silicon bring-ups across different process nodes. Good understanding and exposure to SoC design and architecture Very good understanding of verif and timing concepts having handled DFT timing closure Exposure to all DFT concepts such as JTAG, SCAN, MBIST, BScan, etc Comfortable with VCS/Verdi and Mentor TK. Logical in thinking and ability to gel well within a team Good stakeholder management Ability to quickly adapt to changes and handle pressure Good communication and leadership skills ACADEMIC CREDENTIALS: Bachelors or Masters degree in Computer engineering/Electrical Engineering #LI-SK5 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Design Verification - CPU/IP/Cache Coherence Bangalore, India Engineering 58428 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SILICON DESIGN ENGINEER THE ROLE: The Core design and verification team is responsible for development of ‘High performance and Ultralow power x86 microprocessor core’. The role provides a unique opportunity to work at the micro-architectural level of the next-gen Core, with exposure to designs that defines the next wave of client (laptops/ultra-books/think-clients) and custom designs. The multi-billion gate complexity and high-frequency (GHz) design development gives the learning experience of the latest and greatest design and verification methodologies, using cutting edge advanced technology nodes. THE PERSON: Candidates should have solid track record of working on complex designs with hands on experience on architecting and developing test-bench, test-bench components, test-planning and execution of testplan, coverage development and closure. Candidate should have working experience with global teams spread across different geography and time-zones. KEY RESPONSIBILITIES: ASIC design verification experience 6 to 10 years. Verification of high performance x86-core ISA features Architecting and development of testbench, test-bench components for high performance Cache, x86 ISA features, clock/reset/power features of processor. Development of detailed test plans and driving the execution of test plan, including functional coverage. Understanding the existing test bench setup and look for opportunities to improve the existing test bench. Adhering to coding guideline practices, develop and implement code review process. Collaborate with global design verification teams and drive effectively the execution of the verification plans. Your commitment to innovating as a team demonstrated through excellent communication, knowledge of proper documentation techniques, and independently driving tasks to completion. PREFERRED EXPERIENCE: Strong understanding the design and verification life cycle. Hands on verification experience with C/C++/SystemVerilog testbench development. Hands on experience with coverage planning, coding and coverage closure. Experience with x86, ARM or any other industry standard microprocessor ISA. Experience with Cache, Coherency and Data-Consistency verification. Experience in clocking, reset, power-up sequences and power management verification. Knowledge of microprocessor design-for-debug (DFD) logic will be a plus. Understanding of low power design verification techniques is a plus. ACADEMIC CREDENTIALS: Master’s degree preferred with emphasis in Electrical/Electronics Engineering, Computer Engineering, or Computer Science with a focus on computer architecture LOCATION: Hyderabad #LI-RR1 #Hybrid AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SMTS Sys/Test Validation Eng. Bangalore, India Engineering 63563 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SMTS SYS/VALIDATION ENGINEER THE ROLE: AMD is looking for a MTS or SMTS firmware engineer to join our growing team. As a key contributor you will be part of a leading team to drive and enhance AMD’s abilities to deliver the highest quality, industry-leading technologies to market. THE PERSON: The ideal candidate possesses an innovative and problem-solving mindset, has a keen eye for Software engineering development, and is diligent and passionate about Technology. A successful candidate will need to employ strong knowledge in computer technologies, leadership skills in technical areas, and firmware engineering expertise as well as a strong ability to compete effectively in a fast-paced, relevant environment while working with different teams of engineers and collaborators. KEY RESPONSIBILITIES: Define, develop, execute, and Automate test models and track the results for Firmware/BIOS Testing of AMD Server and GPU Products in pre-silicon and post-silicon phase. Automating Test cases using scripting languages like Python in Windows and Linux environments. Drive innovation in production firmware Combine advanced firmware engineering skills with a drive to explore novel approaches to solve important problems in heterogeneous computing at the large scales. Evaluate and review of existing processes and continuously strive to optimize the workflow. PREFERRED EXPERIENCE: Extensive Python experience and Testcase development, preferably in production environments. Knowledge of Pre-Silicon Testing of BIOS/Firmware using Simulators or Emulators. Prior experience of scripting with C++, Shell, Python, TCL/TK, and AutoIT is an added advantage. Knowledge of Windows and Linux environments. Excellent design and code development skills, familiarity with Linux and modern software/firmware tools and techniques for development. Good analytical and problem-solving skills. Good Knowledge of Computer architecture and It's components like x86 Processors APU, GPU, PCIe , CXL, USB and NVME. Experience with firmware development process and tools such as debuggers and source code control systems a plus. Familiar with CI/CD Tools like Jenkins. ACADEMIC CREDENTIALS: Bachelor’s or Master’s degree in Computer/Software Engineering, Computer Science, or related technical discipline. #LI-SK3 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Strategic / Leadership Role - PD Methodology (CPU) Bangalore, India Engineering 65042 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Job Description: We are seeking a highly experienced and innovative Fellow to join our Physical Design (PD) Methodology team. The successful candidate will be responsible for driving advancements in PD methodologies, strategies, and tools to optimize the design and implementation of our semiconductor products. This role requires a deep understanding of physical design, EDA tools, and the ability to partner with cross-functional teams to achieve state-of-the-art design efficiency and performance. Key Responsibilities: Drive PD Methodology Innovations: Lead the development and implementation of cutting-edge physical design methodologies to enhance design efficiency, performance, and manufacturability. Strategic Planning: Develop and execute strategies that align with industry trends and company goals. Provide strategic direction for PD-related projects and initiatives. Methodology Development: Create and refine methodologies for physical design, including floorplanning, placement, routing, and timing closure. Ensure these methodologies are integrated into the design and development processes. End-to-End Design Optimization: Oversee the entire physical design process from initial concept to tape-out. Ensure design efficiency and performance are maintained throughout the product lifecycle. Cross-Functional Collaboration: Work closely with RTL design teams, verification teams, and other engineering groups to integrate physical design methodologies across all levels of the system. Vendor Engagement: Collaborate with EDA tool vendors such as Synopsys and Cadence to ensure tools meet our design requirements. Drive joint development efforts and influence tool enhancements. Tool and Flow Automation: Lead efforts in the development and optimization of EDA tools for physical design. Work with tool vendors to ensure the tools meet our design requirements. Signoff Enablement: Ensure that all physical design methodologies and processes meet signoff criteria for manufacturability and performance. Technology and Library Enablement: Work with technology and library teams to enable new technologies and libraries in the physical design flow. PPA Optimization Guidance: Provide guidance on optimizing power, performance, and area (PPA) during the physical design process. Debug and Support: Lead efforts in debugging design issues and providing support to design teams to resolve complex physical design challenges. Industry Engagement: Stay abreast of the latest advancements in physical design within the semiconductor industry. Represent the company in industry forums, conferences, and collaborations to influence and adopt best practices. Cross-Functional Leadership: Collaborate with various teams, including design, verification, software, and product management, to ensure physical design goals are met. Provide technical guidance and mentorship to team members. Innovation and Research: Foster a culture of innovation by encouraging research and experimentation in physical design techniques. Identify opportunities for patents and publications. Metrics: Define and track key performance indicators (KPIs) related to physical design efficiency and performance. Report on progress and impact to senior leadership. Qualifications Education: Ph.D. or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Experience: Minimum of 20 years of experience in physical design, EDA tools, or related areas. Proven track record of driving PD methodology innovations and strategies in a leading semiconductor company. Technical Expertise: Deep understanding of physical design, EDA tools, and design optimization techniques. Proficiency in relevant tools and technologies. Publications and Patents: Demonstrated history of publications in reputable journals and conferences. Experience with filing and securing patents related to physical design and EDA tools. Leadership Skills: Strong leadership and team management skills. Ability to lead cross-functional teams and drive complex projects to successful completion. Communication: Excellent verbal and written communication skills. Ability to articulate complex technical concepts to diverse audiences. Industry Knowledge: In-depth knowledge of industry trends, standards, and best practices in physical design for semiconductors #LI-SK5 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Strategic / Leadership Role - PD(CPU) Bangalore, India Engineering 65044 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ We are seeking a highly skilled and innovative Physical Design Specialist to join our team. The successful candidate will be responsible for troubleshooting critical issues, providing independent analysis, and generating data points to identify potential failures in the physical design of our semiconductor products. This role requires a deep understanding of CPU Cores physical design, EDA tools, and the ability to offer unbiased opinions and solutions to complex design challenges. The Physical Design Specialist will play a crucial role in bridging the gap between PD methodology and PD execution teams, ensuring execution excellence. Key Responsibilities: Critical Issue Resolution: Identify and resolve complex physical design problems during dry runs and execution. Provide independent analysis and solutions to critical issues impacting design integrity and performance, including challenges specific to CPU core physical design such as timing closure, optimization, and signal integrity Securing Execution Excellence: Ensure high standards of execution excellence by providing strategic guidance and support to the PD execution team. Monitor and evaluate the effectiveness of physical design processes and methodologies, ensuring optimal performance and power efficiency for CPU cores Bridging Methodology and Execution: Act as a liaison between the PD methodology team and PD execution team to ensure seamless integration of methodologies into practical execution. Facilitate communication and collaboration between teams to address challenges and optimize design processes for CPU core designs Data Analytics Generate and analyze data points to identify potential design failures and areas for improvement. Use advanced tools and techniques to predict and mitigate risks, focusing on CPU core-specific issues like floorplanning, placement, and routing Independent Review and Opinions: Conduct thorough and independent reviews of design methodologies and flows. Offer unbiased opinions and recommendations based on extensive experience and expertise in CPU core physical design strategies Mentorship and Guidance: Mentor and guide design teams on best practices and innovative solutions and share insights and knowledge to enhance team capabilities. Communication: Communicate findings and recommendations effectively to stakeholders and higher management, emphasizing CPU core design considerations Qualifications Education: Ph.D. or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Experience: Minimum of 20 years of experience in physical design, EDA tools, or related areas. Proven track record of driving PD methodology innovations and strategies in a leading semiconductor company. Technical Expertise: Deep understanding of physical design, EDA tools, and design optimization techniques. Proficiency in relevant tools and technologies. Publications and Patents: Demonstrated history of publications in reputable journals and conferences. Experience with filing and securing patents related to physical design and EDA tools. Leadership Skills: Strong leadership and team management skills. Ability to lead cross-functional teams and drive complex projects to successful completion. Communication: Excellent verbal and written communication skills. Ability to articulate complex technical concepts to diverse audiences. Industry Knowledge: In-depth knowledge of industry trends, standards, and best practices in physical design for semiconductors. Why Join Us Innovative Environment: Be part of a team that is at the forefront of physical design methodology innovations. Impactful Work: Contribute to the development of cutting-edge technologies that shape the future of semiconductor design. Collaborative Culture: Work with a diverse and talented team of professionals who are passionate about technology and innovation. Career Growth: Opportunities for professional development and career advancement in a dynamic and growing company. #LI-SK5 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Strategic / Leadership Role - Power (CPU) Bangalore, India Engineering 65047 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ We are seeking a highly experienced and innovative Fellow to join our CPU Cores team. You will drive power innovations, strategies, methodologies, and estimation processes, setting industry standards. Your deep understanding of CPU architecture and power management techniques will be crucial in leading cross-functional teams to achieve cutting-edge power efficiency in our products. In this role, you will collaborate with RTL, verification, and engineering teams to integrate power-efficient solutions into our CPU cores. Your leadership and strategic vision will guide the development of methodologies that optimize power usage. Additionally, you will mentor team members and effectively communicate complex technical concepts to align stakeholders and drive successful implementation. Key Responsibilities Drive Power Innovations: Lead the development and implementation of innovative power management techniques and technologies to enhance the power efficiency of our CPU cores. Strategic Planning: Develop and execute power strategies that align with industry trends and company goals. Provide strategic direction for power-related projects and initiatives. Methodology Development: Create and refine methodologies for power estimation, analysis, and optimization. Ensure these methodologies are integrated into the design and development processes. End-to-End Power Management: Oversee the entire power management process from initial design to post-silicon validation. Ensure power efficiency is maintained throughout the product lifecycle. Cross-Functional Collaboration: Work closely with compiler teams, software teams, and other engineering groups to integrate power management techniques across all levels of the system. Cross-Functional Leadership: Collaborate with various teams, including design, verification, software, and product management, to ensure power efficiency goals are met. Provide technical guidance and mentorship to team members. Power Estimation and Analysis: Lead efforts in power estimation and analysis at different stages of the design cycle. Develop tools and models to predict and measure power consumption accurately. Post-Silicon Power Optimization: Lead efforts in post-silicon power analysis and optimization. Develop and implement strategies to address power issues identified during silicon validation. Innovation and Research: Foster a culture of innovation by encouraging research and experimentation in power management techniques. Identify opportunities for patents and publications. Industry Engagement: Stay abreast of the latest advancements in power management within the CPU industry. Represent the company in industry forums, conferences, and collaborations to influence and adopt best practices. Metrics: Define and track key performance indicators (KPIs) related to power efficiency. Report on progress and impact to senior leadership Qualifications Education: Ph.D. or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Experience: Minimum of 20 years of experience in CPU architecture, power management, or related areas. Proven track record of driving power innovations and strategies in a leading semiconductor company. Technical Expertise: Deep understanding of CPU core design, power management techniques, and power estimation methodologies. Proficiency in relevant tools and technologies. Publications and Patents: Demonstrated history of publications in reputable journals and conferences. Experience with filing and securing patents related to power management and CPU design. Leadership Skills: Strong leadership and team management skills. Ability to lead cross-functional teams and drive complex projects to successful completion. Communication: Excellent verbal and written communication skills. Ability to articulate complex technical concepts to diverse audiences. Industry Knowledge: In-depth knowledge of industry trends, standards, and best practices in power management for CPUs #LI-SK5 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

CPU Performance Verification Bangalore, India Engineering 64949 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ CPU Performance Validation Engineer THE ROLE: The person will be part of AMD's CPU Performance Validation team. This team is part of AMD's global CPU Performance teams and plays a critical role in next generation AMD CPU design. Involves having deep understanding of existing AMD X86 CPU architecture and microarchitecture ranging from CPU pipeline stages to various complex features and structures, debugging performance issues of RTL, giving feedback to design team for latest gen CPU in pre-silicon and emulation environment. We highly encourage people with a creative bent of mind and with a natural ability to dive into the details. This team is a perfect place for people who can understand the present and envision the future. If you find yourself to be a person who wants to go that extra mile to refine an existing process and also understands the opportunities to make it better, if you are the one who has innovative ideas in your brain waiting to find a proper stage to come out, we can offer you the perfect ground for that. THE PERSON: Should have excellent inter-personal, communication skills and ability to work in a fast-paced exciting environment. Continuous learning has always been the moto in this ever changing industry. An ideal person for this role should be a self-learner and always ready to upgrade his/her skills to stay abreast with the technology. The team looks for superstars but also believes in nurturing you into one. Collaboration is the key to success. Ideal candidate should learn at a great pace, deliver what is expected and also share your learning in the team to help the overall growth. It’s always We before Me in the team KEY RESPONSIBILITIES: Responsible for building infrastructure for performance verification and verify performance of X86 processor. Writing specific targeted tests to measure the performance of the processor Involves having a deep understanding of processor micro-architecture and triaging performance issues in RTL and simulator Skillset Debug triage of failures from simulation and emulation environment for CORE or sub level regressions. Writing automatized triages in Perl/Ruby and creating tools using perl/ruby or AMD verification methodology (primarily in C++) to enhance the functional debug and triage process. On a need basis, work on Post-Si bug recreation PREFERRED EXPERIENCE: Experience: 2-5 years' experience in processor/ASIC performance correlation. Experience in micro-architecture testing for modern high-performance processors. Experience in writing tests and building infrastructure that tests performance of modern processors. Experience in application performance analysis Programming/Scripting Skills C, C++, Perl, Python. Solid background and understanding of Digital Design, RTL design , improving model performance and Processor Architecture Strong troubleshooting, analytical and debug skills. Prior experience in performance correlation of Processor subsystems is a plus. Excellent knowledge of computer architecture with relevant research and project work or industry experience Strong programming skills (C/C++ and assembly) Basic knowledge of Verilog ACADEMIC CREDENTIALS: Bachelors/Masters in Computer Science/Electrical/Electronics Engineering with relevant course and research work LOCATION: Bangalore #LI-Hybrid #LI-RR1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law. EOE/MFDV AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Applied Research Scientist - Generative AI Models Bangalore, India Engineering 47051 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE ROLE: The AI Models and Applications team is looking for an exceptional machine learning scientist / engineer to explore and innovate on architectures and training techniques for large language models (LLMs), large multimodal models (LMMs), image/video generation and other foundation models. You will be part of a world-class research and development team focussing on efficient and scalable pre-training, instruction tuning, alignment and optimization. As an early member of the team, you can help us shape the direction and strategy to fulfill this important charter. THE PERSON: This role is for you if you are passionate about reading through the latest literature, coming up with novel ideas, and implementing those through high quality code to push the boundaries on scale and performance. The ideal candidate will have both theoretical expertise and hands-on experience with developing LLMs, LMMs, and/or diffusion models. We are looking for someone who is familiar with hyper-parameter tuning methods, data preprocessing & encoding techniques and distributed training approaches for large models. KEY RESPONSIBILITIES: Pre-train and finetune over large GPU clusters while optimizing for various trade-offs. Improve upon the state-of-the-art in Generative AI model architectures and training techniques. Accelerate the training and inference speed across AMD accelerators. Publish your work at top-tier conferences & workshops and/or through technical blogs. Engage with academia and open-source ML communities. Drive continuous improvement of infrastructure and development ecosystem. PREFERRED EXPERIENCE: Strong development and debugging skills in Python. Experience in deep learning frameworks (like PyTorch or TensorFlow) and distributed training tools (like DeepSpeed or Pytorch Distributed). Experience with fine-tuning methods (like RLHF & DPO) as well as parameter efficient techniques (like LoRA & DoRA). Solid understanding of various types of transformers and state space models. Strong publication record in top-tier conferences, workshops or journals. Solid communication and problem-solving skills. ACADEMIC CREDENTIALS: Advanced degree (Master’s or PhD) in machine learning, computer science, artificial intelligence, or a related field is expected. Exceptional Bachelor’s degree candidates will also be considered. #LI-MK1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Design for Test (DFT) Architect Bangalore, India Engineering 64876 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ PMTS SILICON DESIGN ENGINEER THE ROLE: We are seeking a highly experienced DFT (Design for Test) Principal MTS to join our CPU Cores team in Bangalore. The ideal candidate will have a strong technical background and extensive experience in DFT methodologies, particularly in the context of CPU core design and development. THE PERSON: You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. KEY RESPONSIBILITIES: Lead DFT Strategy and Implementation Develop and execute comprehensive DFT strategies for CPU core projects, ensuring robust testability and manufacturability. Develop and Optimize Test Architectures Design and implement advanced test architectures, including scan insertion, BIST (Built-In Self-Test), LBIST (Logic Built-In Self-Test), and MBIST (Memory Built-In Self-Test), to enhance test coverage and efficiency. Collaborate with Cross-Functional Teams Work closely with design, verification, and physical design teams to integrate DFT requirements seamlessly into the overall design process. Lead Cross-Site Collaboration Coordinate with teams across multiple locations to ensure cohesive and unified DFT strategies, promoting effective communication and collaboration. Create and Validate Test Patterns Generate and validate test patterns for both manufacturing and in-field testing, ensuring high-quality and reliable CPU cores. Analyze and Debug Test Failures Investigate and resolve test failures, providing innovative solutions to improve test coverage, yield, and overall product quality. Conduct Post-Silicon Debugging Perform post-silicon debugging to identify and rectify issues in manufactured silicon, ensuring optimal performance and reliability of CPU cores. Mentor Junior Engineers Provide guidance and mentorship to junior engineers, fostering their development in DFT techniques and best practices. Stay Updated with Latest Technologies Continuously monitor advancements in DFT technologies and methodologies, integrating cutting-edge solutions into the team's workflow. Interface with External Vendors Collaborate with external vendors and partners to ensure the successful integration of DFT solutions into the manufacturing process. Research and Contribute to Patents Engage in research activities, publish findings in reputable journals, and contribute to the development of patents in the field of CPU core design and DFT methodologies PREFERRED EXPERIENCE: Experience with industry-standard DFT tools and methodologies. Knowledge of semiconductor manufacturing processes. Familiarity with scripting languages such as Python or Perl. Experience with low-power design techniques. Outstanding foundation in Systems & SoC architecture, with expertise in one or more of the following: CPU or GPU, Memory sub-system, Fabrics, CPU/GPU coherency, Multimedia, I/O subsystems, Clocks, Resets, Virtualization and Security Experience analyzing CPU, GPU or System-level Micro-Architectural features to identify performance bottlenecks within different workloads Demonstrated expertise in power management microarchitecture, low power design and power optimization, along with power impact at architecture, logic design, and circuit levels Excellent communication, management, and presentation skills. Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies ACADEMIC CREDENTIALS: Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related one. 15-18 years of experience in DFT, with a focus on CPU core design. Proven track record of leading DFT projects from concept to production. Deep understanding of DFT techniques such as scan insertion, ATPG, BIST, LBIST, and MBIST. Strong problem-solving skills and ability to debug complex test issues. Excellent communication and leadership skills. Ability to work effectively in a collaborative team environment #LI-RR1 #LI-HYBRID AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

CPU/GPU Post Silicon Validation Architect (Functional) Bangalore, India Engineering 56139 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SMTS/PMTS SILICON DESIGN ENGINEER THE ROLE: The AMD Cores system validation team is looking for a dynamic, energetic CPU Cores Validation engineer to join our growing team focused on the Zen CPU. Cores Systems Validation Engineer will architect, drive and perform hands-on system level debug to isolate functional failures to a specific IP or domain. Exposure begins at the architecture level, working with pre-silicon teams to maximize pre-silicon coverage, post-silicon bring-up and enablement, and engagement through production and working with customer facing teams for best adoption. You will work in a dynamic environment, directly with the product, tools, motherboards, and BIOS/OS. THE PERSON: As a key contributor to the success of AMD’s Cores roadmap, you will be driving and directing a high performing team towards the delivery of high quality, industry-leading processors to the market. The validation team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. KEY RESPONSIBILITIES: Orchestrate the functional validation of CPU Cores by participating in the Test plan definition, Content generation, Execution and Debug of critical functional issues. Isolate and triage generic system level failures into a more focused area of the platform or CPU. Drive debug and resolution of Zen CPU validation issues across silicon, firmware/BIOS, and coordinating with memory partners as needed Develop x86 content to exercise new features and reproduce complex bugs in silicon Devise validation strategy from pre-silicon through customer adoption working across architecture, silicon design, firmware, validation, and debug teams Proactively participating in project planning, developing, and maintaining schedules, managing dependencies, and ensuring quality of deliverables at committed milestones. Generates/Maintains regular status representing the Cores Validation team in program meetings providing status to program management PREFERRED EXPERIENCE: Programming/scripting skills (e.g. C/C++, Perl, Ruby, Python) x86 assembly programming Debug techniques and methodologies Extensive experience with board/platform-level debugging, including delivery, sequencing, analysis, and optimization Extensive knowledge of system architecture, technical debug, and validation strategy Strong analytical/problem-solving skills and pronounced attention to details Must be a self-starter, and able to independently drive tasks to completion ACADEMIC CREDENTIALS: Masters degree in CS/EE with 10-20 years of experience. #LI-RR1 #LI-HYBRID AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SMTS - GPU Performance Architect – Modeling Bangalore, India Engineering 58812 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ GPU Performance Architect – Modeling The Team: AMD's Data Center GPU organization is transforming the industry with AI based Graphic Processors. Our primary objective is to design exceptional products that drive the evolution of computing experiences, serving as the cornerstone for enterprise Data Centers, (AI) Artificial Intelligence, HPC and Embedded systems. If this resonates with you, come and join our Data Center GPU organization where we are building amazing AI powered products with amazing people. The Role: Architect, analyze and optimize high-performance GPU-centric SoCs for Cloud Computing, and Machine Learning acceleration. Develop performance models and methodologies. Propose solutions to enhance performance and optimize power for next-generation data center systems. The Person: As a system performance architect on our design engineering team, you will help propose and implement solutions to our next generation GPU SoCs and optimize data center system application performance. Key Responsibilities: Participate in microarchitecture exploration, performance modeling, and analysis for next-generation GPU systems. Understand the design and architecture, propose solutions to enhance performance. Help with micro-benchmarking, workload characterization, competitive analysis, bottleneck identification, and optimization. Develop tools and methodologies for performance analysis of workloads. Communicate, propose, and implement solutions to enhance processor and system performance. Preferred Experience: Strong knowledge of GPU, CPU, SoC or computer system microarchitecture Experience with the development and usage of computer system performance models Some experience with computer workload analysis Strong programming skills, including experience with C++ and Python (or similar) Academic Credentials: Ph.D. in Computer Science / Electronics Engineering, and 3+ years of experience as a Performance Engineer M.S./M.Tech. in Computer Science / Electronics Engineering, and 5+ years of experience as a Performance Engineer B.Tech. in Computer Science / Electronics Engineering, and 7+ years of experience as a Performance Engineer Location: Bangalore, India #LI-PK1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

ASIC - SoC Design Verification Bangalore, India Engineering 64581 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SE NIOR SILICON DESIGN ENGINEER (AECG ASIC - SoC Design Verification) THE ROLE: The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s custom silicon/ASIC designs, resulting in no bugs in the final design. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES : Collaborate with the Arch, Design, Functional DV, Emulation, Platform Debug, etc teams to understand Architecture and verification asks Ability to come with detailed testplan based on the Arch specs Good understanding and exposure to SoC design and architecture 4years of Design Verification experience with strong Verilog, System Verilog, C and UVM/OVM knowledge Candidate should be able to develop Testbench. Thorough understanding of verification environments including need, methodology, stimulus, checkers, scoreboards, coverage aspects. Developing functional coverage & assertions. Own the DV sign-off and ensure a bug free design Work with the post-silicon team on debug support and to help root-cause any failures Have worked on wireless protocol design verification Bringing up Testbench/SoC verification environment. Good understanding of SoC RESET/CLOCK flow Exposure to DEBUG concepts such as JTAG etc Comfortable with VCS/Verdi and excellent debug skills Logical in thinking and ability to gel well within a team Good communication skills PREFERRED EXPERIENCE: Proficient in SoC/sub-system/IP level ASIC verification Proficient in debugging RTL code using simulation tools Experienced with Verilog, System Verilog, C, and C++ Worked on any High Speed Interface like PCIE/DDR/USB/Other, Good understanding of AXI/AHB/APB Bus protocol Prior knowledge of ARM/RISC Processor based designs verification and bring-up verification Developing UVM based verification frameworks and testbenches, processes and flows Good understanding and hands-on experience in the UVM concepts and SystemVerilog language Scripting language experience: Perl, Python, Makefile, shell preferred. #LI-RP1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

LeadSoftware System Design Eng - Audio framework Bangalore, India Engineering 57125 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Lead SOFTWARE SYSTEM DESIGN ENGINEER THE ROLE: The right engineer will drive the success of power IP (Intellectual Property) and features in AMD (Advanced Micro Devices) products through leadership & coordination, resolution of technical dependencies, and achievement of schedule commits. This is a high-visibility and widely multi-functional role, spanning pre-silicon architecture to post-silicon implementation & product delivery. THE PERSON: Your curiosity will drive your learning and innovation to improve how we as a group, and an organization, can get better every day. Your peers will provide you a results-oriented and encouraging environment for your career growth, fueling your opportunity to be a part of Delighting Our Customers. KEY RESPONSIBILITIES: Own the multi-functional Power Feature Enablement team for new AMD APU (Accelerated Processing Unit) products Work across engineering teams and subject areas spanning silicon, firmware, hardware, and software Coordinate debug of issues and drive them to closure Pull together meetings, set up clear agendas and follow up on action items Deliver regular progress updates toward program goals Make tough decisions such as priority calls based on partial or incomplete data Proactively drive continuous improvement for post-silicon power and performance activities Must be a self-starter, and able to independently drive tasks to completion PREFERRED EXPERIENCE: Product development or systems engineering background with hardware platforms and their software & firmware ecosystems Excellent verbal communication and written, presentation skills Excellent interpersonal, organizational, analytical, planning, and technical leadership skills Proven record of accomplishment in delivering large multi-functional product solutions Experience working in a fast-paced matrixed technical organization and multi-site environment Product or program management Engineer with 10+ years of experience in embedded Linux driver/kernel development specifically in the area of Audio Strong C/C++ development skills with a good understanding of object-oriented design Good understanding of Linux fundamentals and audio fundamentals Experience with ALSA ASoC driver development Experience with audio transmission protocols like I2S/TDM, audio DAC/ADC Experience with audio DSP firmware development Experience working with one or more DSP IPs (TI, Cadence, ADI, etc...) System knowledge, System Debugging, firmware debugging using JTAG Experience with multi-core DSP architecture and inter-processor communication Experience with one or more audio post processing frameworks such as Audio Weaver Engine, Xtensa Audio Framework Experience with ALSA user lib, plugins, configurations, and parameters Experience of understanding schematics and using hardware equipment such as logic analyzer, oscilloscope ACADEMIC CREDENTIALS: Bachelor’s or Master's degree in Computer or Electrical Engineering or equivalent #LI-PS1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

C/C++ Programming + Scripting - CPU Infra Verification Bangalore, India Engineering 56524 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ CPU Verification Infra engineer THE ROLE: The person will be part of AMD's CPU Performance Validation team. This team is part of AMD's global CPU Performance teams and plays a critical role in next generation AMD CPU design. Involves having deep understanding of existing AMD X86 CPU architecture and microarchitecture ranging from CPU pipeline stages to various complex features and structures, debugging performance issues of RTL, giving feedback to design team for latest gen CPU in pre-silicon and emulation environment. We highly encourage people with a creative bent of mind and with a natural ability to dive into the details. This team is a perfect place for people who can understand the present and envision the future. If you find yourself to be a person who wants to go that extra mile to refine an existing process and also understands the opportunities to make it better, if you are the one who has innovative ideas in your brain waiting to find a proper stage to come out, we can offer you the perfect ground for that. KEY RESPONSIBILITIES Tool Integration, Code line Integration (the code line will have a mix of components written in C++, Verilog, System Verlig, Perl, Python, Ruby etc ) ; Porting Code from previous project and Devops related work. Machine Learning: Should be able to handle large data sets and use/enhance existing training models. Scripting work and coming up with debug utilities to help CPU Verification Infrastructure, TestPlan, Debug Teams. Regression Infrastructure management for CPU Verification Team. Maintenance or development work related to stimulus generation tool/architecture models/checkers/verification components of CPU. Interact with Feature Verification engineer and understanding the stimulus requirements and scope for enhancement based on coverage etc Provide help to stakeholders/Feature Verification Engineers on a regular basis for stimulus development. SKILLS AND EXPERIENCE REQUIREMENTS B.E/B.Tech/M.E/M.Tech in Computer Science/Electrical/Electronic Engineering Min 3+ Yrs of experience Must have knowledge of OOP Concepts , C++. Assembly language will be a plus. Must be well versed in using Perl and Python. Well versed with using version control systems like Perforce , Github etc. Should have work experience working in linux environment. Well versed with writing crons and automating tasks. Well versed with build/make files. Good to have Skills: Webservices, API/REST API , DevOps (Javascript, Angular, MySql, NoSql, HTML, PHP), ML (supervised and unsupervised basics, knowledge on handling data sets) Should be a good team player, quick thinker, pro-active, adaptable & outspoken/approachable. Must communicate well both written and orally. Must be well-organized and should be able to multitask well with due diligence on closing his/her tasks. Must be a team player. Basic Knowledge of Verilog, System Verilog is a plus Basic Knowledge of Pre Silicon Verification (Work experience in Verification domain would be a preferrable). CPU Architecture and CPU verification knowledge will be a plus. Academic knowledge of computer architecture, digital electronics, data structures, operating system, compilers. ACADEMIC CREDENTIALS: Bachelors/Masters in Computer Science/Electrical/Electronics Engineering with relevant course and research work #LI-RR1 #hybrid AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Strategic / Leadership Role - PD Hyderabad, India Engineering 64616 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ FELLOW SILICON DESIGN ENGINEER THE ROLE: We are looking for a Fellow-level Engineer to join our team to develop world-class Server products . In this role you will be engaged with Server SOC architects, micro architecture, RTL, CAD/Methodology, and internal stakeholders to define end to end Power Optimization Methodology, PVT Corners, timing methodology that require technically analyzing, defining usage cases, and mapping across a broad spectrum of technologies to ensure a well-defined methodology to achieve PPA uplift across a spectrum of Server products. In this role you will provide a cohesive technical vision of the required PPA improvement methodology. THE PERSON: You will possess very strong problem-solving skills and bring broad experience in methodology, with a strong, self-motivated work ethic. KEY RESPONSIBILITIES: Define and drive PPA uplift methodologies for Server products Develop and deploy end to end power optimization methodology for Physical Design Implementation Define PVT corners, device frequency scaling, frequency targets for next generation Servers in leading foundry technology nodes Deep knowledge of micro architecture, power optimization methodologies, Synthesis, Place and Route, Top level Clocking structure and Timing closure. Hands-on experience in closing very high-frequency designs Proven track record of tapeout experience with leading technology nodes like 10nm, 7nm and 5nm Experience driving Physical Implementation methodology Excellent communication skills and strong collaboration across multiple business units PREFERRED EXPERIENCE: 20+ years’ experience in SOC Physical Design Implementation, Methodology, Signoff and TapeOut In-depth experience and deep conceptual understanding of domains like Full Chip Floorplanning, CTS, PnR, STA, PV, EMIR, Low power design, Logic synthesis, LEC/Formality, VSI, etc. Presentations, Papers and proven innovations, Patents in these domains is a strong plus Forward looking and dependable techincal leader who proactively identifies and resolves issues and roadblocks before they become bottlenecks or showstopper. Experience working seamlessly across engineering disciplines and geographies to deliver excellent results ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-SK5 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SOC Performance Modeling- CPU/GPU/NPU/Multimedia Hyderabad, India Engineering 63346 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ CPU PERFORMANCE ENGINEER THE ROLE: The successful candidate will work in AMD's Client CPU Performance Team in Hyderabad, India. The team’s mandate is to analyze performance and drive next generation CPU core hardware and software optimizations on key applications for AMD’s notebook and desktop processors. This role will involve analyzing and tracing system-level workloads, performance analysis on internal and competitive hardware platforms and the development of tools and methodologies for workloads analysis and data collection. THE PERSON: You have a passion for leading edge CPU/SoC architecture, design and verification. You are a team player who has excellent communication skills and enjoys collaborating with architects & engineers located in different sites and time-zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Work with CPU micro-architects and designers to optimize future CPU cores Analyze the competition and identify areas for future improvement in our products Characterize workloads, project performance, and debug performance problems Run performance simulations and analyze results to evaluate CPU architectural features Enhance existing application tracing techniques Develop and maintain tools for data collection and analysis Execute post-silicon debug/tuning efforts to ensure AMD processors are fully performance optimized Job responsibilities also include multi-discipline interactions with microprocessor architects, ISA definition owners, software optimizers, compiler team, logic designers, and verification engineers to identify, resolve and document architectural performance issues PREFERRED EXPERIENCE: 3-15years of prior industry/academic experience Strong experience with computing software, including operating systems, hypervisors, compilers, drivers, and applications Experience with computer architecture, system simulation, and performance evaluation Experience analyzing system bottlenecks and optimizing computing systems for performance Adept at mathematical and statistical modeling Experienced with x86 instruction set processors Proficient in C/C++ programming and software engineering concepts ACADEMIC CREDENTIALS: Bachelors, Masters or PhD degree in Electronics/Computer Engineering or Computer Science with emphasis on computer architecture preferred #LI-RR1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Soc Design Architect Hyderabad, India Engineering 64362 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Soc Design Architect THE ROLE: We are seeking a seasoned SoC Design Lead with expertise or significant interest in leading the development of High end networking silicon. You have had significant success driving the execution of SoCs working with IP, Subsystem, Physical design teams. You are meticulous about Power, Performance and Area while driving schedule and managing cost. This senior role will stretch you as you lead for driving bleeding edge networking IP and silicon driving milestones across multiple geographies. THE PERSON: You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at distilling the SOC design challenges driving respective teams to adhere to milestones, leveraging you technical expertise in solving SoC design issues and are proactive in communicating progress to upper management KEY RESPONSIBILITIES: Define product features and capabilities, close architecture, and micro-architecture requirements, drive technical specifications for SoC and IP blocks to meet those requirements, and provide technical direction to execution teams Comprehend the SOC as a complete system which includes HW (Silicon), FW, BIOS & SW and ensure that FW, BIOS & SW are aligned to enable all features, optimizing for performance and power Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop architectural solutions to achieve product requirements Knowledge sharing and other contributions to Platform & System Architecture As an overall product owner, responsible for architecture analysis and technical solutions for marketing/feature change requests Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets, Emulation plans, Pre-Si bug resolution and Performance/Power Verification sign offs Support Post-Si teams for Product Performance, Power and functional issues debug/resolution PREFERRED EXPERIENCE: Outstanding foundation in Systems & SoC architecture, with expertise in one or more of the following: CPU or Networking, Memory sub-system, Fabrics, Switches, Multimedia, I/O subsystems, Clocks, Resets, Virtualization and Security Experience analyzing CPU, Networking or System-level Micro-Architectural features to identify performance bottlenecks within different workloads Demonstrated expertise in power management microarchitecture, low power design and power optimization, along with power impact at architecture, logic design, and circuit levels Excellent communication, management, and presentation skills. Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies ACADEMIC CREDENTIALS: Bachelor’s or Master’s degree in related discipline preferred #LI-PS1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SMTS Systems Design Eng. Hyderabad, India Engineering 62878 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE TEAM AMD's Data Center GPU organization is transforming the industry with our AI based Graphic Processors. Our primary objective is to design exceptional products that drive the evolution of computing experiences, serving as the cornerstone for enterprise Data Centers, (AI) Artificial Intelligence, HPC and Embedded systems. If this resonates with you, come and joining our Data Center GPU organization where we are building amazing AI powered products with amazing people. THE ROLE: We are seeking an experienced HPC Systems Engineer with 7+ years of expertise in high-performance computing (HPC) environments. This role requires hands-on experience with Python, Kubernetes (K8s), Slurm, OpenStack, and Ansible , along with the ability to support external clients in live troubleshooting sessions. The PERSON: The ideal candidate will have deep technical knowledge of drivers, troubleshooting methods, and system-level debugging and will play a key role in managing, optimizing, and troubleshooting HPC clusters and cloud-based HPC environments. KEY RESPONSIBILITIES: HPC System Administration & Troubleshooting Manage and optimize HPC clusters, ensuring high availability and performance. Troubleshoot GPU, CPU, network drivers, firmware, and OS-level issues. Debug storage, networking, and job scheduling bottlenecks in Slurm-based environments. Kubernetes & Cloud HPC Environments Deploy and manage HPC workloads in Kubernetes for AI/ML and parallel computing. Optimize OpenStack-based HPC clusters with Ceph, Cinder, and Neutron for cloud scalability. Implement containerized HPC workflows using Kubernetes and OpenShift. Automation & Infrastructure As Code (IaC) Develop Ansible and Terraform scripts for provisioning and managing HPC resources. Automate job scheduling, cluster monitoring, and log analysis using Python. Optimize CI/CD pipelines for HPC and AI/ML applications. Performance Tuning & Benchmarking Benchmark and optimize multi-node HPC workloads (MPI, NCCL, ROCm, CUDA). Tune OS parameters, networking (InfiniBand, RoCE), and Slurm configurations for peak performance. Enhance HPC storage performance (Ceph, Lustre, NFS) and distributed computing efficiency. Client Support & Collaboration Provide real-time technical support and troubleshooting for HPC users. Engage with developers, DevOps, and system administrators to optimize cluster performance. Document solutions, best practices, and contribute to internal knowledge bases. PREFERRED QUALIFICATIONS: Experience with AMD MI300, MI2X0 GPUs, ROCm, MPI, UCX, or XPMEM. Exposure to containerized workloads using Singularity or Docker in HPC. Familiarity with OpenStack deployment automation (e.g., TripleO, Kolla, or OpenStack-Ansible). Experience in customer-facing technical roles, with a strong ability to troubleshoot live issues. This role is critical in ensuring seamless HPC operations, troubleshooting complex system issues, and supporting high-profile clients with real-time problem resolution in both bare-metal and cloud-based HPC environments. ACADEMIC CREDENTIALS: Bachelor or Masters Degree in Computer Engineering or Electrical/Electronics Engineering #LI-PK1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.