Get alerts for new jobs matching your selected skills, preferred locations, and experience range. Manage Job Alerts
7.0 - 11.0 years
0 Lacs
hyderabad, telangana, india
On-site
Job Requirements Roles & Responsibilities Ownership of end-to-end Physical Design flow from RTL to GDSII for complex SoC/ASIC designs. Responsible for floorplanning, partitioning, placement, CTS, routing, and physical verification (DRC/LVS/Antennas etc.). Timing closure activities across PVT corners, multi-mode multi-corner (MMMC) analysis. Work on power planning and optimization (IR drop, EM analysis, low-power design methodologies). Handle STA (Static Timing Analysis) using tools like PrimeTime/Tempus and drive closure. Collaborate closely with RTL designers, DFT, STA, and verification teams to resolve issues proactively. Experience in synthesis and formal equivalence checking (LEC) to ens...
Posted 18 hours ago
5.0 - 10.0 years
15 - 20 Lacs
hyderabad, bengaluru
Work from Office
Responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must. Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Excellent problem-solving skills in physical verification of custom layout. Demonstrate high quality and accurate execution to meet project schedule/milestones in multiple project environment. Ability to guide junior team-members in their execution of Sub block-level layouts & review critical items....
Posted 1 week ago
3.0 - 7.0 years
0 Lacs
karnataka
On-site
As a member of the TECH RADICLE Family, you will be part of our team as a Layout Design Engineer. With a minimum experience of 3 years, you will work on technology nodes such as 7nm and 5nm, primarily focusing on Lower Nodes. Our preferred foundry is TSMC. If you are an Engineer with a keen interest in this opportunity, we encourage you to share your updated resume with us at career@techradicle.in. Join us in shaping the future of technology with TECH RADICLE.,
Posted 3 months ago
4.0 - 9.0 years
15 - 20 Lacs
Hyderabad
Work from Office
Role & responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. • Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. • Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Excellent problem-solving skills in physical verification of custom layout. • Demonstrate high quality and accurate execution to meet project schedule/milestones in multiple project environment. • Ability to guide junior team-members in their execution of Sub block-level layouts & rev...
Posted 4 months ago
Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.
We have sent an OTP to your contact. Please enter it below to verify.
Accenture
123151 Jobs | Dublin
Wipro
40198 Jobs | Bengaluru
EY
32154 Jobs | London
Accenture in India
29674 Jobs | Dublin 2
Uplers
24333 Jobs | Ahmedabad
Turing
22774 Jobs | San Francisco
IBM
19350 Jobs | Armonk
Amazon.com
18945 Jobs |
Accenture services Pvt Ltd
18931 Jobs |
Capgemini
18788 Jobs | Paris,France