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Senior RTL Design Engineer DSP/ASIC/FPGA Talenton Technology Services

8.0 - 13.0 years

40 - 80 Lacs

bengaluru

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Senior RTL Design Engineer DSP / ASIC / FPGA Experience: 10 to 15 years Location: Bangalore (On-site) Employment Type: Full-time / Permanent About the Role We are seeking a highly skilled Senior RTL Design Engineer to join our digital design team. The selected candidate will be responsible for the RTL design and development of signal processing pipelines for high-performance ASIC and FPGA-based SoCs. Key Responsibilities Develop and integrate custom sub-components of the digital signal processing pipeline such as filters, FFTs, control logic, etc. Write micro-architecture specifications, code RTL, and perform verification and validation of DSP components. Optimize RTL for performance, area, ...

Posted 1 month ago

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