VLSI ASIC SOC Verification Lead

You are a talented and motivated Design Verification Engineer with 6-15 years of experience, sought by HCLTech VLSI division in Bangalore. Your role is crucial in ensuring the functionality and quality of next-generation integrated circuits. You will be working on challenging projects, utilizing your expertise in verification methodologies and tools. Your responsibilities will include developing and implementing verification plans using industry-standard methodologies like UVM. You will design and write robust verification environments to achieve high code coverage. Utilizing simulation tools such as ModelSim, Cadence Incisive, and Synopsys VCS, you will verify RTL functionality and debug verification failures to identify design issues" root cause. Collaboration with RTL design engineers to resolve bugs and ensure design revisions meet verification requirements is key. Your participation in code reviews and adherence to verification coding standards is essential, along with staying updated on the latest verification tools and methodologies. To qualify for this role, you should hold a Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree is a plus). Your 6-15 years of experience in design verification for ASICs or SoCs, strong understanding of digital design principles, and proficiency in Verilog or VHDL with experience in methodologies like UVM are required. Experience with simulation tools and scripting languages like Python and Perl will be advantageous. Excellent analytical, problem-solving, communication, and collaboration skills are essential for effective team work. In return, HCLTech offers a competitive salary and benefits package, the opportunity to work on cutting-edge technologies and projects, a collaborative and dynamic work environment, and potential for professional development and career advancement. Thank you, Magenderan.R Manager - TAG HCLTECH,