Full EE Design ownership for assigned systems or subystems from concept to production (Schematic Design, PCB Stackup Design, Layout Guidance, Layout Simulations, HW Bring-Up, Characterization, Functional & Stress Testing, Release to Production)
Debug / Troubleshoot complex design issues with systems in development as well as currently shipping systems, with an emphasis on root-cause-analysis.
Attends functional and cross-functional team meetings.
Provides regular detailed progress reports to management

Qualifications:

MSEE with 8+ years or BSEE with 10+ years of hardware development experience.
Proven track record of successfully bringing designs from concept to production.
Excellent understanding of transmission line theory.
HW Design experience with high-speed serial interfaces such as PCIe Gen2Gen4 and 100GbE KR4 and CAUI4.
HW Design experience with high-speed parallel interfaces such as DDR4 & DDR5.
Experience in Intel XEON-based x86 Server Design is a plus.
Experienced with lab analysis/debug tools such as high-speed oscilloscopes, logic analyzers, protocol analyzers.
Experienced in CAD tools for schematic capture and layout (Cadence Design Systems experience is a plus).
FPGA / CPLD design experience for glue/combinatorial logic is a plus.
Experienced with layout simulations tools for high-speed interfaces and power integrity such as Ansys Electromagnetics Suite.
Good understanding of Design-for-Manufacturing and Design-for-Test requirements and trade-offs.
Excellent analytical and problem solving skills.
Excellent interpersonal, organizational, and communication skills.

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