Sr. Silicon Design Engineer

Job Description

The person will be part of AMDs CPU verification team. This team is part of AMDs global CPU verification teams and plays a critical role in next generation AMD CPU design verification. Involves having a deep understanding of existing AMD X86 CPU architecture and microarchitecture ranging from CPU pipeline stages to various complex features and structures, debugging functional issues of RTL and verification components of latest gen CPU in pre-silicon and emulation environment. THE PERSON: Should have excellent interpersonal, communication, leadership skills and ability to work in a fast-paced exciting environment. Continuous learning has always been the moto in this ever-changing industry. An ideal person for this role should be a self-learner and always ready to upgrade his/her skills to stay abreast with the technology. The team looks for superstars but also believes in nurturing you into one. Collaboration is the key to success. The ideal candidate should learn at a great pace, deliver what is expected, and also share your learning in the team to help the overall growth. It s always We before Me in the team. KEY RESPONSIBILITIES: Debug triage of failures from simulation and emulation environment for CORE or sub-system/unit level regressions. The spectrum covers - (frontend fetch/decode, Execute/Load-store, Floating point, Cache hierarchy). Guide the team to write automatized triages in Perl/Ruby and creating tools using Perl/ruby or AMD verification methodology (primarily in C++) to enhance the functional debug and triage process. Analyze test cases in assembly language and C++ based testbench. Adapt to use ML/AI to enhance the debug efficiency. Derive stimulus strategy (directed tests/ random tests) to be run on Core regressions for efficient bug hunting. Handle Core Debug Infrastructure. Work with other Stakeholders/teams to enhance stimulus holes for bug escapes/coverage holes, backend infra etc Innovate/Add necessary process automations. Ability to lead & manage a team of 10+ members to achieve the goals efficiently and grow the team technically further. Manage Program/Project level deliverables on multiple CPU DV aspects. Support Post silicon needs. PREFERRED EXPERIENCE: Minimum 3+ years experience in ASIC Design Verification, with strong knowledge of x86/ARM Computer Architecture / Micro-Architecture. Solid background and understanding of Digital Design, RTL design and strong troubleshooting, analytical and debugging skills. Must have excellent knowledge of design & verification flows. Excellent leadership / mentoring / communication skills and ability to work seamlessly with cross site teams. Any Verification methodology involving OOPs concepts C++, OVM/UVM methodology knowledge and experience is a plus. Prior experience in functional verification of Processor subsystems such as x86 or ARM domain-based Cores is a plus. Exposure To ML/AI based solutions is a plus. ACADEMIC CREDENTIALS: Preferably B.E/B.Tech/M.E/M.Tech in Electrical/Electronics/Computer Engineering