DFT Lead Engineer ASIC/SoC Talenton Technology Services

10.0 - 18.0 years

40 - 90 Lacs

bengaluru

Work from Office

DFT Lead Engineer ASIC/SoC About the Company: Aevas mission is to bring the next wave of perception to a broad range of applications — from automated driving to industrial robotics, consumer electronics, and beyond. Aeva’s groundbreaking 4D LiDAR technology integrates key LiDAR components onto a single silicon photonics chip, enabling devices to sense both position and instant velocity for safer, smarter decision-making. Role Overview: As a DFT Lead Engineer , you will define, develop, and optimize Design-For-Test architecture for Aeva’s high-performance LiDAR SoCs . You’ll own the end-to-end DFT strategy — from planning and insertion to verification, silicon bring-up, and yield improvement....

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DFT Lead Global innovation leader company

8.0 - 12.0 years

0 Lacs

maharashtra

On-site

As a DFT engineer, you will play a crucial role in planning, implementing, and verifying DFT features for multiple SoCs. Your responsibilities will include working on various aspects of IP and SoC DFT, such as DFT Architecture, Spyglass DFT, RTL implementation, Verification, Scan, ATPG, SCAN insertion, ATPG, pattern simulation/debug, MBIST, Repair implementation, TOP DFT architecture Design, ATE vector setup, and Yield improvement. You will be driving the DFT implementation for features like Scan, MBIST, TAP, and should have experience in executing at least 3 full SoC end to end. Key Responsibilities: - Work on various aspects of IP and SoC DFT including DFT Architecture, Spyglass DFT, RTL i...

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DFT Lead/DFT Sr Staff SEMIFIVE

8.0 - 12.0 years

0 Lacs

karnataka

On-site

Role Overview: As a DFT Architect at SEMIFIVE, you will be responsible for defining and owning the SoC-level DFT architecture, ensuring first-time-right silicon, and leading customer engagements by representing Semifive in technical discussions. Your role will also involve mentoring junior engineers, providing sign-off accountability for DFT across multiple SoC tapeouts, and collaborating with cross-functional teams to deliver complex SoC programs for global customers. Key Responsibilities: - Define and own the SoC-level DFT architecture including Scan, MBIST, JTAG/TAP, BISR, Compression, Boundary Scan, and LBIST. - Perform DFT RTL integration, Spyglass DFT checks, Scan insertion, ATPG gener...

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