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3 Job openings at Smartshore Infoservices Private Limited
Summit BA

Gurgaon / Gurugram, Haryana, India

8 - 15 years

INR 30.0 - 50.0 Lacs P.A.

On-site

Full Time

Job Description Summit BA Liaise with business users to gather and document requirements. Work closely with the technical team to design solutions that meet business needs. Prepare detailed functional specifications and test cases.. Collaborate with Business Analysts, Testing teams, and other SMEs throughout the project lifecycle. Strong knowledge and experience with the latest Summit FT Architecture

Summit Developer

Gurgaon / Gurugram, Haryana, India

8 - 15 years

INR 30.5 - 50.0 Lacs P.A.

On-site

Full Time

Summit Developer Good knowledge and experience on latest Summit FT Architecture on V6 and above Good business knowledge of Capital Markets Experience in Summit Modules: Documentation, Accounting, Credit Risk Management, Market Risk , Management, Trade Processing, STP, Payments and Settlements

Design Verification with strong experience in ARM

Hyderabad, Telangana, India

4 - 10 years

INR 12.0 - 30.0 Lacs P.A.

On-site

Full Time

Role: Design Verification with strong experience in ARM Experience: 4 10 years Location Bangalore or Hyderabad. Strong experience in ARM based SOCand ARM based SS level Design verification . Must have worked on ARM based SOC viz Cortex A or M series based SOC Experence in Multi processor based ARMcpu is plus Coresight Debug knowledge coresight is plus : ARM SoC based debug infrastructure including CoreSight infrastructure (implementation and/or validation). Strong debug skills with AXI/AHB/APB, memory, and NoC components. Strong work experience in AMBA AXI/AHB protocol based NOC , Understanding/ experience in CHI/ACE is plus Strong skills/Proficiencyin SystemVerilog, UVM Strong work experience(Advanced skills ) in SV-UVM and/or Cbased verification. Working knowledge in TB/Checker/SB development is plus. Must posses strong SV/UVM debugging Proficiency inC/C++ modeling. GLS experience is a plus; Should have worked on handling regressions RTL /GLS simulations and should possess excellent debugging skills Must be proactive, independent, and capable of strong simulation debug. Work Expereince or Strong knowledge in Memory SS verification - LPDDR5/LPDDR4/DDR protocols or HBMis plus Work experience in PCIe/CXL and other similar complex protocol like Ethernet is plus Scripting knowledge python, perl if worked is plus and should posses working knowledge in updating/fixing flow/pre or post processing scripts

cta

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