Silicon Hardware Architecture Modeling Engineer

As an experienced professional in the field of computer architecture performance analysis and optimization, you will play a crucial role in shaping the future of AI/ML hardware acceleration. Your primary responsibility will be to drive the advancement of cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You will have the opportunity to work alongside a diverse team of experts who constantly strive to push boundaries and develop custom silicon solutions that drive the future of Google's TPU. Your expertise in developing software systems in C++ will be invaluable as you contribute to the innovation behind products loved by millions worldwide. Your role will involve working closely with hardware and software architects to model, analyze, and define next-generation Tensor Processing Units (TPU). You will be tasked with conducting Machine Learning (ML) workload characterization and benchmarking, as well as performance and power analysis to evaluate proposals effectively. Collaboration will be a key aspect of your responsibilities, as you work with partners in hardware design, software, compiler, ML model, and research teams to facilitate effective hardware/software codesign. Your insights and optimizations will help shape the capabilities and roadmap for next-generation TPUs, playing a pivotal role in the continuous advancement of AI/ML hardware acceleration. Join us in the Technical Infrastructure team where we take pride in developing and maintaining the architecture that keeps Google's product portfolio running smoothly. As part of this team, you will have the opportunity to leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.,