Semichip Technolabs PVT LTD

1 Job openings at Semichip Technolabs PVT LTD

Register Transfer Level Engineer (RTL), (DV) Design Verification Bengaluru 3 - 8 years INR Not disclosed Work from Office Full Time

. Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field. . 3-10 years of experience in RTL design and Design Verification implementation for VLSI systems.

Semichip Technolabs PVT LTD

1 Jobs

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