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Senior Design Verification Lead / Manager BITSILICA

8.0 - 12.0 years

0 Lacs

hyderabad, telangana

On-site

As an experienced digital IP verification engineer with over 8 years of experience, you have a strong understanding of ASIC/SoC design and state-of-the-art verification methodologies. Your proficiency in Verilog, SystemVerilog, and UVM allows you to develop and maintain UVM-based verification frameworks, testbenches, and processes effectively. You have a solid grasp of UVM concepts, including SystemVerilog Assertions (SVA) and scoreboard architecture. Your familiarity with industry-standard high-speed protocols such as USB, PCIe, UFS, SATA, and Ethernet, as well as standard interconnects like AMBA (AXI, APB, AHB), enables you to excel in digital IP verification. **Key Responsibilities:** - D...

Posted 1 week ago

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