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5.0 - 9.0 years
0 Lacs
karnataka
On-site
As an AMS Verification Engineer, you will play a crucial role in ensuring the functionality and quality of Analog Mixed Signal (AMS) designs. Your role will involve the following responsibilities: - Developing and executing verification plans for AMS designs to validate their functionality. - Creating and automating testbenches for AMS verification to enhance the efficiency of the verification process. - Building and maintaining SystemVerilog real number models to accurately represent the AMS designs. - Collaborating with analog and digital design teams to ensure that the designs meet the required specifications. - Verifying the functionality of AMS/DMS IP/chip to guarantee its performance. ...
Posted 1 month ago
5.0 - 9.0 years
0 Lacs
karnataka
On-site
We are looking for 2 AMS (Analog Mixed Signal) verification engineers who possess more than 5 years of experience, have hands-on RNM modeling exposure, and are well-versed with Cadence AMS/DMS Flow. As an AMS Verification Engineer, you should have the following skills: - Strong RNM modeling skills. - Proficiency with Cadence AMS/DMS flow. - Experience with SystemVerilog and Verilog-AMS. - Knowledge of analog and mixed-signal design principles. - Experience with UVM (Universal Verification Methodology). - Ability to debug AMS modeling issues. - Experience with basic scripting/automation. - Good communication and documentation skills. Your responsibilities will include: - Developing and execut...
Posted 3 months ago
5.0 - 9.0 years
0 Lacs
karnataka
On-site
As an AMS Verification Engineer, you will play a crucial role in ensuring the successful verification of Analog Mixed Signal designs. With a minimum of 5 years of experience in this field, you will be responsible for developing and executing verification plans, creating testbenches, and collaborating with design teams to guarantee that designs meet specifications. Your key skills will include strong RNM modeling proficiency, hands-on experience with Cadence AMS/DMS flow, familiarity with SystemVerilog and Verilog-AMS, and a solid understanding of analog and mixed-signal design principles. Additionally, you should have expertise in UVM, the ability to debug AMS modeling issues, and experience...
Posted 3 months ago
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