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Chassis Power Architect, Silicon Google Inc

5.0 - 10.0 years

5 - 10 Lacs

Bengaluru, Karnataka, India

On-site

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Science, a related field, or equivalent practical experience. 5 years of experience in power enhancement workflow and techniques. Experience with power management IPs. Preferred qualifications: Experience in low power design including UPF/CPF, multi-voltage domains, power gating, and on-chip power management IP design. Experience in Verilog, SystemVerilog, RTL, and gate-level SPICE simulations, and statistical SPICE models. Experience using EDA tools like Conformal LP, Power-Artist, DC/RC, PT/PTPX, Incisive/VCS. Experience in post-silicon power calibrations and debug. Experience in design and analysis of full-chip ...

Posted 3 months ago

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