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Post Silicon Validation Engineer 2

Post Silicon Validation Engineer 2

Tessolve

7 - 10 years

8 - 9 Lacs

Bengaluru

Posted:1 day ago| Platform:

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Skills Required

RTOS SAN System testing ASIC Linux USB SOC Troubleshooting Android Python

Work Mode

Work from Office

Job Type

Full Time

Job Description

About Us:

Tessolve offers a unique combination ofpre-silicon and post-silicon expertise to provide an efficient turnkey solutionfor silicon bring-up, and spec to the product. With 3200+ employees worldwide,Tessolve provides a one-stop-shop solution with full-fledged hardware andsoftware capabilities, including its advanced silicon and system testing labs.

Tessolve offers a Turnkey ASIC Solution,from design to packaged parts. Tessolve s design services include solutions onadvanced process nodes with a healthy eco-system relationship with EDA, IP, andfoundries. Our front-end design strengths integrated with the knowledge fromthe backend flow, allows Tessolve to catch design flaws ahead in the cycle,thus reducing expensive re-design costs, and risks. We actively invest in theR&D center of excellence initiatives such as 5G, mmWave, Silicon photonics,HSIO, HBM/HPI, system-level test, and others. Tessolve also offers end-to-endproduct design services in the embedded domain from concept to manufacturingunder an ODM model with application expertise in Avionics, Automotive,Industrial and Medical segments. Tessolve s Embedded Engineering servicesenable customers a faster time-to-market through deep domain expertise,innovative ideas, diverse embedded hardware & software services, andbuilt-in infrastructure with world-class lab facilities.

Tessolve s clientele includes Tier 1clients across multiple market segments, 9 of the top 10 semiconductorcompanies, start-ups, and government entities. We have a global presence over12 countries with office locations in the United States, India, Singapore,Malaysia, Germany, United Kingdom, Canada, UK, Japan, Taiwan, Philippines, andTest Labs in India, Singapore, Malaysia, Austin, San Jose.

For more details, visit www.tessolve.com .

Job Overview

Brief description about the Job.

Job Location : Electronic -City, Phase II,Bangalore.

Who you are

Port and develop tests for baremetalenvironments on mobile SoC platforms.

Design, implement, and debug firmwarefor embedded systems, ensuring robust and scalable solutions.

Work closely with hardware teams to define system requirements and validatehardware functionality.

Utilize JTAG and other debugging tools for low-level troubleshooting andvalidation.

Develop and execute test plans for various SoC subsystems (CPU, GPU,multimedia, TPU, PCIe, USB).

Optimize code for performance,efficiency, and memory usage in resource-constrained environments.

Automate test execution and reportingusing Python or Bash scripts.

Document test procedures, results, and codebase for maintainability andknowledge sharing

Who you are

Proficiency in C and Assemblyprogramming for embedded systems.

Experience with firmware development and debugging on baremetal or RTOSenvironments.

Strong understanding of JTAG and otherhardware debugging interfaces.

Hands-on experience with at least two SoC subsystems: CPU, GPU, multimedia,TPU, PCIe, or USB.

Familiarity with SoC architectures and low-level hardware/software interaction.

Experience with test automation using Python or Bash is a plus. Excellentproblem-solving skills and attention to detail.

Strong communication and teamwork abilities.

Experiencewith Linux, Android, or RTOS environments.

Knowledge of device drivers and peripheral interfacing (I2C, SPI, UART). Exposureto performance verification and systemvalidation methodologies.

Familiarity with version controlsystems (e.g., Git)

Tessolve Semiconductor Private Limited, aswell as its affiliates and subsidiaries ( Tessolve ) does not requirejob applicants to make any payments at any stage of the hiring process. Anyrequest for payment in exchange for a job opportunity at Tessolve is fraudulentand should be ignored. . Tessolve is not responsible for any lossesincurred due to such fraudulent activities

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Post Silicon Validation Engineer 2