Green Semiconductors Pvt Ltd

Development of analog IC layout design Experience with Cadence layout environment platform and its integrated solutions (Layout XL Compliance, Constraint Manager, Design Intent, CLE, EAD, automatic router…). LVS, DRC, RC extraction experience ranging from 4 to 10 years of experience Strictly for Noida location Job Type: Full-time Pay: From ₹1,600,000.00 per year Benefits: Health insurance Provident Fund Experience: Layout design: 4 years (Required) cadence Virtuoso : 4 years (Required) Work Location: In person