Associate III - VLSI SVP - CD

Role Overview: As a Memory Circuit Design Engineer with 4+ years of experience, you will be responsible for designing and implementing custom digital circuits for SRAM/memory arrays. You will optimize circuits for power, performance, area (PPA), and yield. Your role will involve performing schematic capture, simulation, and margin analysis using tools like Cadence Spectre/SPICE/HSPICE. Additionally, you will work on memory architecture, hierarchy, compiler automation, and characterization in advanced technology nodes like 2nm, 3nm, 5nm, or 7nm. Key Responsibilities: - Design and implement custom digital circuits for SRAM/memory arrays - Perform schematic capture, simulation, and margin analysis - Optimize circuits for power, performance, area (PPA), and yield - Work with tools like Cadence Spectre/SPICE/HSPICE and industry standard memory design tools - Collaborate on memory architecture, hierarchy, compiler automation, and characterization - Utilize scripting knowledge in Python, Perl, and TCL for automation tasks Qualifications Required: - 4+ years of consistent experience in memory custom circuit design - Strong foundation in CMOS circuit design and device physics - Hands-on experience with Cadence Spectre/SPICE/HSPICE and memory design tools - Working experience with advanced technology nodes like 2nm, 3nm, 5nm, or 7nm - Knowledge of memory architecture, hierarchy, compiler automation, and characterization - Proficiency in scripting languages like Python, Perl, and TCL About UST: UST is a global digital transformation solutions provider with a track record of over 20 years. With a workforce of over 30,000 employees across 30 countries, UST collaborates with leading companies worldwide to drive real impact through transformation. The company's core values of technology, people, and purpose guide them in partnering with clients from design to operation, embedding innovation and agility to create boundless impact and touch billions of lives.,