Why Work With Wafer Space At Wafer Space, we believe that each position is a career path; not just a job. As a member of our team you are valued for your efforts and career growth is driven entirely by your performance and not by your years of experience. We will personally work with you to set up a career plan for you to assist you in achieving your career goals. Benefits TRAINING & SKILL DEVELOPMENT REGULAR OUTINGS FLEXIBLE WORK HOURS PAID HEALTH INSURANCE BEST VACATION POLICIES STA, Synthesis Location - Bangalore, Chennai & Hyderabad Desired Skills and Experience- Detailed knowledge of EDA tools and flows, Tempus/Primetime experience is a must Well-versed with the timing closure (STA), timing closure methodologies Pre/Post-layout constraint development to timing closure Handshake with the design team and develop functional/DFT constraints IP level constraint integration Multi-voltage/Switching aware corner definitions RC/C model selection understanding Abstraction expertise like Hyperscale/ILM/ETM RC Balancing and scaling analysis of full chip clock RC Balancing and scaling analysis of critical data paths Good automation skills in PERL, TCL, and EDA tool-specific scripting DMSA @ full chip and custom scripts for timing fixes