1 Signoffpvpdnstafvclpscandrctk Methodology Jobs

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4.0 - 10.0 years

0 Lacs

hyderabad, telangana

On-site

As an experienced Hardware Engineer at Qualcomm India Private Limited, you will be responsible for the physical design of ASICs, ensuring successful execution from netlist to GDS2. Your expertise in ASIC designs Place and Route flow, low-power methodologies, and PnR tools like Innovus/Fusion compiler will be crucial in this role. Your ability to debug Congestion and CTS issues, as well as familiarity with Sign-off methodology and tools, will be essential for ensuring the quality of the final product. Key Responsibilities: - Thorough knowledge and hands-on experience in ASIC designs Place and Route flow and methodology - Execute complete PD ownership from netlist to GDS2, including HM level P...

Posted 1 week ago

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