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8.0 - 13.0 years
9 - 14 Lacs
bengaluru
Work from Office
Minimum of 10+ years of experience in DFT implementation Proven experience in implementing DFT techniques such as scan insertion, MBIST, BIST, JTAG, OCC, EDT etc Develop DFT strategy and architecture, including hierarchical DFT. Experience in JTAG and iJTAG protocols and architectures. ATPG pattern generation, ATPG patterns verification with gate-level simulation MBIST pattern generation, Pattern simulations with gate-level simulations BIST implementation for both AC & DC pins Experience working in Partition/Block/SoC level designs Experience in working with SSN implementation and verification. Experience in DFT Flows brings up from scratch (Script implementation) Experience with EDA tools f...
Posted 1 month ago
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