SerDes PHY Digital Design Engineer

As a DDR/HBM Memory Interface I/O Circuit Designer at Synopsys, your role will involve designing DDR/HBM Memory Interface I/O circuits and layouts, including GPIO and special I/Os. You will collaborate with the DDR/HBM PHY team, package engineers, and system engineers to ensure the designs meet specifications. It will be crucial for you to adhere to best practices in circuit design and layout methodology. Conducting thorough design reviews, contributing to process improvements, and staying updated with the latest analog design technologies will be essential. Additionally, you will document design processes and provide support for validation and testing. Key Responsibilities: - Designing DDR/HBM Memory Interface I/O circuits and layouts, including GPIO and special I/Os. - Collaborating with the DDR/HBM PHY team, package engineers, and system engineers to meet design specifications. - Ensuring adherence to best practices in circuit design and layout methodology. - Conducting thorough design reviews and contributing to the continuous improvement of design processes. - Staying updated with the latest advancements in analog design technologies and methodologies. - Documenting design processes and providing support for design validation and testing. Qualifications Required: - Bachelor's or Master's degree in Electronics or Electrical Engineering. - 1-3 years of experience in CMOS processes and deep submicron technologies. - Proficiency in CMOS circuit design and layout methodology. - Basic understanding of analog/mixed signal circuitry. - Familiarity with ASIC design flow and JEDEC requirements for DDR interfaces. As part of the dynamic and innovative team at Synopsys, you will contribute to advancing analog design capabilities and delivering cutting-edge solutions for the semiconductor industry. The team values collaboration, creativity, and a commitment to excellence.,