5.0 - 9.0 years

0 Lacs

karnataka

On-site

As a Physical Design Engineer with Innovus skills, your role will involve the following key responsibilities: - Solid experience in place & route flow, including placement guidelines, clock-tree synthesis, routing, and timing optimizations. - Experience with hierarchical designs and/or Low Power implementation is considered an advantage. - Proficiency in Synthesis, interfacing with RTL, and implementation. - Expertise in Floorplan design, which includes placement of hard macros and congestion reduction techniques. - Familiarity with Static Timing Analysis activities, parasitic extractions, and sign-off requirements. - Knowledge of Physical Verification processes such as DRC/LVS/DFM and chip ...

Posted 1 day ago

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Senior Physical Design Engineer / Leads Eximietas Design

10.0 - 12.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Hi All, Eximietas Hiring Senior Physical Design Leads/Managers. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. About the job Qualification Required: Typically requires a minimum of 10+ years of experience in Physical Design with mainstream P&R tools Bachelors OR Masters Degree Engineering in Electronics or Electrical or Telecom or VLSI Engineering. Roles And Responsibilities Working on 10nm/7nm/5nm or lower nodes designs with various customers for deployment. Expertise in solving customers problems for critical designs to achieve desired performance, area, and power targets. Responsible for developin...

Posted 5 days ago

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Physical Design Engineer with Innovus skills Source-right

5.0 - 9.0 years

0 Lacs

karnataka

On-site

You have solid experience in place & route flow, including placement guidelines, clock-tree synthesis, routing, and timing optimizations. Additionally, you have experience in hierarchical designs and/or Low Power implementation. Your expertise also extends to synthesis, interfacing with RTL, and implementation. You are skilled in floorplan design, which includes the placement of hard macros and congestion reduction techniques. Furthermore, you have experience in Static Timing Analysis activities, parasitic extractions, and sign-off requirements. Knowledge of Physical Verification (DRC/LVS/DFM, chip finishing) is considered an added advantage. Qualifications Required: - 5+ years of experience...

Posted 6 days ago

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