Company Description MBit Wireless specializes in the development of 4G/5G connectivity and edge computing solutions, offering chipsets, software, and turnkey platforms for mobile broadband, IoT, and EV applications. . MBit Wireless operates from offices in Chennai, India, driving innovation in cutting-edge wireless and computing technologies. We are looking for: · Hands-on experience in analog/mixed-signal design (e.g., amplifiers, comparators, ADCs, bias circuits). · Solid understanding of CMOS device physics and transistor-level design . · Familiarity with Cadence Virtuoso , Spectre , or similar EDA tools. · Strong analytical skills and a passion for learning new design techniques. Qualifications Expertise in Analog Circuit Design and Analog Circuits Proficiency in Power Management design Strong Circuit Design skills Relevant experience in semiconductor or electronics design engineering Excellent problem-solving abilities and attention to detail Bachelor's or Master's degree in Electrical Engineering or a related field Familiarity with EDA tools (beneficial but not mandatory) What we offer: · Opportunity to work on advanced SoC and mixed-signal IC projects . · Collaborative environment with experienced analog engineers. · A culture that values innovation, precision, and continuous learning. If you’re ready to design the analog future , we’d love to hear from you!
Company Description MBit Wireless Private Limited is a next-generation fabless semiconductor innovator delivering advanced 4G/5G SoCs, edge-computing chipsets, software, and turnkey solutions that power the future of mobile broadband, AIoT, and EV ecosystems. Our ultra-low-power, high-efficiency processors enable smarter, faster, and more connected devices across global markets Role Description Design and develop RTL for complex SoC subsystems using Verilog/SystemVerilog Implement and integrate IPs such as CPU/MCU, interconnects (AXI/AHB), memory controllers, peripherals, and accelerators Translate architecture and micro-architecture specifications into high-quality RTL Ensure synthesizable, timing-clean, and low-power RTL following coding guidelines Perform block-level and SoC-level integration Collaborate closely with architecture, verification, physical design, and firmware teams Support functional verification , including debug of simulation and emulation failures Address lint, CDC/RDC, reset, and low-power checks Participate in design reviews and incorporate feedback Support DFT requirements (scan, MBIST, JTAG integration) Work with UPF/low-power intent and power domain implementations Analyze and resolve timing, area, and power issues in coordination with PD teams Maintain RTL quality for reusability, scalability, and maintainability Assist in post-silicon debug and silicon bring-up activities Document design specifications, integration guides, and release notes Qualifications 3 to 5 years of experience in RTL development B.Tech/BE Electronics & Communication Engineering, Electrical & Electronics Eng Strong expertise in SystemVerilog/Verilog Solid understanding of digital design fundamentals Experience with AMBA protocols (AXI, AHB, APB) Familiarity with EDA tools (simulation, synthesis, lint, CDC) Ability to debug complex SoC-level issues