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8.0 - 12.0 years
0 Lacs
hyderabad, telangana
On-site
You will be responsible for driving DFT implementation in Wireless SoC chips. You will have full ownership of ATPG architecture, design, implementation, verification, and deployment to Silicon testing, collaborating with Test engineers. Your duties will also involve MBIST design, implementation, and verification for all memories in the SoC. You should be capable of generating and debugging DFT patterns on the tester. You will work closely with the design, design-verification, and backend teams to facilitate the integration and validation of the test logic in all phases of the design and backend implementation flow. To excel in this role, you are required to have 8-10 years of experience and a B.Tech/M.Tech degree in ECE or EEE. You must possess full-chip DFT working experience with multiple design Tape Outs and expert knowledge of DFT architecture on complex Designs with multiple clock domains. Furthermore, experience in ATPG for pattern generation and simulation of Test Transition faults, Stuck-at, IDDQ, at-speed faults is essential. Hands-on experience in industry-standard DFT tools like Mentor Tessent suite or Synopsys DFT compiler is also a must-have. Your responsibilities will also include block-level and chip-level SCAN insertion, DRC, Coverage Analysis, and improvements. Expertise in Scan Compression (EDT/OPMISR+), MBIST, ATPG implementation, and verification is crucial. You should have expert knowledge of Test time reduction, good knowledge of cross-functional domains (SYN, LEC, STA, PD) with ownership of constraints developments & LEC. Developing/automating flows and scripts in Perl/Tcl to enhance the DFT methodologies & process is expected from you. Experience working with cross-functional global teams, Low-Power DFT requirements, and Low-Power MBIST architectures and Memory testing is also necessary. Preferred qualifications include experience in DFT related RTL integration, excellent communication and analytical skills, experience in leading junior teams, mentoring/training, and project leadership, as well as exceptional problem-solving skills. In addition to the challenging work environment, you can look forward to benefits such as Equity Rewards (RSUs), Employee Stock Purchase Plan (ESPP), insurance plans with Outpatient cover, National Pension Scheme (NPS), flexible work policy, and childcare support. Join us and be a part of a highly skilled team where every engineer's contribution significantly impacts the product, while also enjoying a good work/life balance and a welcoming and fun work environment.,
Posted 2 weeks ago
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