6 Cadence Lec Jobs

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm Overview: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. General Summary: 8-15 years of relevant ASIC design experience Solid experience in digital front end design for ASICs Exper...

Meta is seeking an Application-Specific Integrated Circuit (ASIC) Design Engineering Manager to lead our team in developing processing blocks for a System-on-Chip (SOC). As a key leader, you will drive Register-Transfer Level (RTL) design planning and execution, foster innovative methodologies, and manage IP design and SOC integration. You will collaborate closely with cross-functional teams, including Architecture, Software/Firmware, Verification, Modeling, Emulation, and Post-Silicon Validation, to shape silicon architecture and micro-architecture development. ASIC Engineering Manager Responsibilities: Lead an ASIC design team, managing Register-Transfer Level (RTL) design planning and exe...

As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. **Key Responsibilities:** - Full chip design for multi-million gates SoC - Digital design and development (RTL) - Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification - Manage IP dependencies, planning and tracki...

Asic Design Engineering Manager Responsibilities Manage an ASIC design team responsible for various processing blocks in a SOC. Drive RTL design planning and execution, innovative design methodology development, u-Arch, IP design and SOC integration. Participate in silicon architecture, interface with Architecture, SW/FW, Design, Modelling, Emulation, and Post-Silicon Validation teams Partner with internal and external cross-functional teams, across all levels of a corporation, from executives, team managers and individual contributors including development engineers, capacity planners and supply chain experts Contribute to and drive development of and maintain overall silicon strategy align...

As a Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include working on cutting-edge technologies such as circuits, mechanical systems, Digital/Analog/RF/optical systems, FPGA, and DSP systems to contribute to the launch of world-class products. Collaborating with cross-functional teams, you will develop innovative solutions and ensure performance requirements are met. To qualify for this role, you must hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 8 years of Hardware Engin...

Qualcomm India Private Limited is seeking a talented individual to join their Hardware Engineering team. As a part of the Engineering Group, you will be responsible for ASIC design with a focus on digital front end design. The ideal candidate should hold a PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field, along with 3-5 years of relevant experience in ASIC design. Key responsibilities include RTL coding in Verilog/VHDL/SV for complex designs with multiple clock domains, expertise in bus protocols like AHB, AXI, and NOC designs, and experience in low power design methodology and clock domain crossing designs. Additionally, the candidate should have ...