Asic Design Engineering Manager Meta Platforms

5.0 - 11.0 years

6 - 12 Lacs

bengaluru, karnataka, india

On-site

Asic Design Engineering Manager Responsibilities Manage an ASIC design team responsible for various processing blocks in a SOC. Drive RTL design planning and execution, innovative design methodology development, u-Arch, IP design and SOC integration. Participate in silicon architecture, interface with Architecture, SW/FW, Design, Modelling, Emulation, and Post-Silicon Validation teams Partner with internal and external cross-functional teams, across all levels of a corporation, from executives, team managers and individual contributors including development engineers, capacity planners and supply chain experts Contribute to and drive development of and maintain overall silicon strategy align...

Posted 4 weeks ago

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SoC RTL Design Manager - Director Qualcomm

15.0 - 19.0 years

0 Lacs

karnataka

On-site

As a Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include working on cutting-edge technologies such as circuits, mechanical systems, Digital/Analog/RF/optical systems, FPGA, and DSP systems to contribute to the launch of world-class products. Collaborating with cross-functional teams, you will develop innovative solutions and ensure performance requirements are met. To qualify for this role, you must hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 8 years of Hardware Engin...

Posted 1 month ago

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ASIC RTL Design Engineer - Qualcomm

2.0 - 6.0 years

0 Lacs

hyderabad, telangana

On-site

Qualcomm India Private Limited is seeking a talented individual to join their Hardware Engineering team. As a part of the Engineering Group, you will be responsible for ASIC design with a focus on digital front end design. The ideal candidate should hold a PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field, along with 3-5 years of relevant experience in ASIC design. Key responsibilities include RTL coding in Verilog/VHDL/SV for complex designs with multiple clock domains, expertise in bus protocols like AHB, AXI, and NOC designs, and experience in low power design methodology and clock domain crossing designs. Additionally, the candidate should have ...

Posted 3 months ago

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