Name: Jobpe
Address: T-Hub, Plot No 1/C, Sy No 83/1, Raidurgam panmaktha, Knowledge City Rd, Hyderabad, Telangana, 500081, IN
Telephone: +91-83339-09630
Price range: Free

SoC RTL Design Manager - Director Qualcomm

15.0 - 19.0 years

0 Lacs

karnataka

On-site

As a Hardware Engineer at Qualcomm India Private Limited, you will play a crucial role in planning, designing, optimizing, verifying, and testing electronic systems. Your responsibilities will include working on cutting-edge technologies such as circuits, mechanical systems, Digital/Analog/RF/optical systems, FPGA, and DSP systems to contribute to the launch of world-class products. Collaborating with cross-functional teams, you will develop innovative solutions and ensure performance requirements are met. To qualify for this role, you must hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with at least 8 years of Hardware Engineering experience. Alternatively, a Master's degree with 7+ years of experience or a PhD with 6+ years of experience in a related field will also be considered for this position. Your primary responsibility will be to develop next-generation SoCs for mobile products and their adjacencies. This role will involve working on all aspects of VLSI development, including micro architecture, platform architecture, front-end design, and design convergence. Additionally, you will oversee physical design and verification aspects to ensure the successful development of SoCs. Key responsibilities for this position include: - Full chip design for multi-million gates SoC - Digital design and development (RTL) - Managing IP dependencies and tracking front-end design tasks - Driving project milestones across design, verification, and physical implementations - Developing architecture and micro-architecture from specifications - Understanding various bus protocols like AHB, AXI, and peripherals such as USB, SDCC - Reviewing top-level test plans and ensuring timing closure - Post-silicon bring-up and debug experience - SoC integration exposure and challenges - Design verification aspects and SoC specification to GDS To excel in this role, you should have a minimum of 15 years of solid experience in SoC design, expertise in Synopsys Design Compiler Synthesis, formal verification with Cadence LEC, and working knowledge of timing closure. Strong communication and leadership skills are essential for effective collaboration with program applicants and mentoring a small to medium-sized group. Qualcomm is an equal opportunity employer committed to providing an accessible process for individuals with disabilities. If you require accommodation during the application/hiring process, please contact Qualcomm via email at disability-accommodations@qualcomm.com or their toll-free number. Qualcomm expects its employees to adhere to all applicable policies and procedures, including security measures related to the protection of confidential information. Please note that Qualcomm's Careers Site is intended for individuals seeking employment directly with Qualcomm. Staffing and recruiting agencies are not authorized to submit profiles, applications, or resumes on behalf of individuals. Unsolicited submissions from agencies will not be accepted. For further information about this role, please reach out to Qualcomm Careers directly.,

Posted 1 week ago

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ASIC RTL Design Engineer - Qualcomm

2.0 - 6.0 years

0 Lacs

hyderabad, telangana

On-site

Qualcomm India Private Limited is seeking a talented individual to join their Hardware Engineering team. As a part of the Engineering Group, you will be responsible for ASIC design with a focus on digital front end design. The ideal candidate should hold a PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field, along with 3-5 years of relevant experience in ASIC design. Key responsibilities include RTL coding in Verilog/VHDL/SV for complex designs with multiple clock domains, expertise in bus protocols like AHB, AXI, and NOC designs, and experience in low power design methodology and clock domain crossing designs. Additionally, the candidate should have experience in Spyglass Lint/CDC checks, waiver creation, formal verification with Cadence LEC, and understanding of the full RTL to GDS flow to collaborate with DFT and PD teams. Desired qualifications for this role also include experience in mobile Multimedia/Camera design, DSP/ISP knowledge, working knowledge of timing closure, expertise in Perl, TCL language, post-Si debug, and good documentation skills. The ability to create a unit level test plan is essential for this position. Minimum qualifications for this role include a Bachelor's degree with 4+ years of Hardware Engineering experience, a Master's degree with 3+ years of relevant experience, or a PhD with 2+ years of related work experience. Qualcomm is an equal opportunity employer and is committed to providing reasonable accommodations for individuals with disabilities during the application/hiring process. If you are looking to be a part of a dynamic team where your skills and expertise will be valued, consider applying for this exciting opportunity at Qualcomm India Private Limited. For further information about this role, please reach out to Qualcomm Careers.,

Posted 1 month ago

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