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5.0 - 10.0 years

5 - 15 Lacs

bengaluru

Work from Office

Job Description: We are looking for an experienced Physical Design Engineer with strong expertise in EMIR analysis and end-to-end RTL to GDSII flow. The ideal candidate should have hands-on experience in physical design, power integrity, and timing closure at advanced process nodes. Key Responsibilities: Handle complete RTL to GDSII implementation Perform EMIR (Electro migration and IR drop) analysis and closure Conduct timing analysis , power planning , and floor planning Run and debug DRC , LVS , and STA reports Work on advanced technology nodes (e.g., 7nm, 5nm ) Collaborate with cross-functional teams (FE, DFT, verification, etc.) Automate flows using Python , TCL , or Perl Required Skills: Strong experience in Physical Design Hands-on expertise in EMIR tools and flow ( Highly Important ) Proficiency in EDA tools (Cadence Innovus, Synopsys ICC2, Prime Time, Mentor Calibre) Understanding of VLSI Design Principles Familiarity with low power design methodologies Good scripting skills in Python, TCL, Perl Excellent analytical, problem-solving, and communication skills

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