Job Title: Senior Engineer – DE Engineering Support (AMS Verification & CAD)
Location: Bengaluru
Experience: 10+ years
CTC Budget: Up to ₹45 LPA
Role Overview
We are seeking an experienced engineering professional to support analog and mixed-signal (AMS) verification environments, simulation flows, and CAD infrastructure. The role involves enabling functional and parametric verification, developing automation, troubleshooting simulation issues, and optimizing computing resources for engineering teams.
Key Responsibilities
- Develop, maintain, and support functional and parametric verification flows for analog and mixed-signal designs.
- Support functional verification, test planning, and regression management using Cadence Incisive, vManager, and vPlanner.
- Configure and maintain parametric verification and regression environments using Cadence Virtuoso ADE XL.
- Support simulation flows using Spectre, AFS, Incisive, and VCS AMS.
- Develop and maintain AMS models using wreal, SystemVerilog, and Verilog-AMS.
- Support UVM-based testbenches and Unified Netlisting (UNL) flows.
- Enable and troubleshoot FastSPICE simulation flows using Cadence Spectre or Synopsys CustomSim/FineSim Pro solutions.
- Automate simulation setup, regression execution, results processing, and reporting.
- Diagnose issues involving EDA tools, simulation convergence, netlisting, models, and verification environments.
- Optimize CAD workflows, simulation performance, and computing resource utilization.
- Support Linux/Unix infrastructure and LSF job scheduling for simulation workloads.
- Collaborate with design, verification, CAD, and IT teams to resolve engineering issues and maintain reliable environments.
- Document methodologies, configurations, troubleshooting procedures, and best practices.
Required Skills and Experience
- Minimum 10 years of relevant experience in AMS verification, CAD methodology, EDA application support, or design engineering support.
- Excellent understanding of functional and parametric verification methodologies.
- Hands-on experience with Cadence Virtuoso ADE XL, Incisive, vManager, and vPlanner.
- Strong working knowledge of Spectre, AFS, VCS AMS, and FastSPICE simulation environments.
- Experience developing mixed-signal models using wreal, SystemVerilog, and Verilog-AMS.
- Working knowledge of UVM testbench methodologies and UNL flows.
- Strong scripting skills in Tcl, Shell, Perl, Cadence SKILL, and Python.
- Strong Linux/Unix troubleshooting skills and understanding of engineering IT infrastructure.
- Practical experience with LSF workload management, job submission, monitoring, and resource optimization.
- Strong analytical, debugging, documentation, and cross-functional communication skills.
Educational Qualification
B.E./B.Tech or M.E./M.Tech in Electronics, Electrical Engineering, Microelectronics, VLSI, or a related discipline.
Pay: ₹4,000,000.00 - ₹4,500,000.00 per year
Work Location: In person
