Post-Silicon CPU Debug Staff Engineer

Role Overview: You will be joining Qualcomm India Private Limited's Engineering Group in the Hardware Engineering department. Your main responsibility will be to define the Debug Enabling Tools Strategy for the next generation CPU product line before design execution. This will involve tasks such as defining the DFD Hardware Validation Strategy, aligning with customers and architecture/micro-architecture teams, estimating efforts, identifying equipment and platform requirements, and ensuring the overall validation scope is met. You will also lead the DFD Domain by setting validation coverage metrics across all validation teams engaged from HW design through post-silicon and beyond. Your role will also include acting as the customer voice for DFD Architecture/micro-Architecture owners, providing detailed feedback on DFD feature definition and implementation to meet customer requirements. Key Responsibilities: - Define the Debug Enabling Tools Strategy for the next generation CPU product line - Define the DFD Hardware Validation Strategy - Align with customers and architecture/micro-architecture teams - Estimate efforts and identify equipment and platform requirements - Ensure overall validation scope is met - Drive the DFD Domain by setting validation coverage metrics - Identify coverage gaps between teams and add additional test cases to respective plans - Act as the customer voice for DFD Architecture/micro-Architecture owners - Provide detailed feedback on DFD feature definition and implementation to meet customer requirements Qualifications Required: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field - At least 4 years of Hardware Engineering or related work experience OR - Master's degree with 3+ years of experience OR - PhD with 2+ years of experience (Note: Additional details of the company were not present in the provided job description, hence omitted),