L2 Cache Design Engineer

You will be joining the High-Performance CPU Design Team at Qualcomm India Private Limited as an L2 Cache Design Engineer. Your primary responsibility will be driving micro-architecture development for L2 cache subsystems, implementing and optimizing cache coherency protocols, and collaborating with various teams to deliver high-quality designs. Your key responsibilities will include developing micro-architecture specifications, owning RTL design, working on coherency verification strategies, and contributing to design methodology improvements. Key Responsibilities: - Develop micro-architecture specifications for L2 cache and related coherency logic. - Own RTL design and refinement to meet timing, power, and reliability goals. - Work closely with DV teams on coherency verification strategies. - Participate in performance modeling and exploration for high-bandwidth cache systems. - Contribute to design methodology improvements and automation. Qualifications Required: - Strong knowledge of cache and memory subsystems, including L2 cache design principles. - Expertise in cache coherency protocols (MESI/MOESI, directory-based schemes). - Proficiency in SystemVerilog RTL, simulation, and debug tools. - Familiarity with AMBA CHI/AXI protocols and interconnect design. - Understanding of low-power design techniques and timing closure. - Solid grasp of computer architecture fundamentals: pipeline design, hazard detection, ordering rules. - Experience with scripting (Perl/Python) for design automation is a plus. Preferred Qualifications: - 2 to 15 years exp in CPU or SoC design focusing on cache/memory subsystems. - Hands-on experience with multi-level cache hierarchies and coherency verification. - Exposure to physical design constraints and PPA optimization. Join Qualcomm India Private Limited to work on cutting-edge CPU architectures for high-performance, low-power devices. Collaborate with world-class engineers in a dynamic, innovative environment and explore opportunities for growth and leadership in advanced micro-architecture design. Minimum Qualifications: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. OR - Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience. OR - PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.,