ASIC SOC RTL Design Architect

As a Senior RTL Design (Micro-architecture) Architect / Sr. Manager at Eximietas Design, you will be responsible for the following: Role Overview: - Utilize your 10+ years of ASIC SOC RTL (Micro-architecture) experience in locations such as Bengaluru, Visakhapatnam, San Jose, Bay Area, or Austin, USA. - Integrate ARM Processor, preferably M55, into designs and demonstrate a strong understanding of design concepts. - Implement ASIC flow, SDC, STA reports, CDC logic, lint rules, exceptions, and block level simulations for IP bring-up. - Apply knowledge of AMBA buses, common processor architectures (ARM, RiscV), and FPGA experience including part selection, pin assignment, timing constraints, synthesis, and debug. - Utilize relevant tools like Socrates, Core Consultant, simulation tools (xcellium, vcs), and JTAG debugging tools (Coresight, Lauterbach). - Implement low power design techniques and UPF. Key Responsibilities: - Collaborate with architects and verification teams to meet project deadlines. - Coordinate with customer leads to ensure timely deliverables. Qualifications Required: - Bachelor's degree in Computer Science, Electrical, or Electronics. - Minimum of 10 years of experience in ASIC SOC RTL (Micro-architecture). - Proficiency in ARM Processor Integration, preferably M55. - Understanding of design concepts, ASIC flow, SDC, STA reports, CDC logic, lint rules, exceptions, AMBA buses, common processor architectures, and FPGA experience. - Familiarity with relevant tools such as Socrates, Core Consultant, simulation tools, and JTAG debugging tools. - Knowledge of low power design techniques and UPF. Please note that having a Valid H1B or being already in the US is a requirement for this position. If you meet the qualifications and are interested in this opportunity, kindly share your updated resume with maruthiprasad.e@eximietas.design.,