1. Describe the design flow from logic to testing and post-silicon validation.
2. Implement the following logic using MUX and multiplier gates: If A, then F = D * E; otherwise, F = G * H.
3. How do you reduce a 3D Karnaugh map?
4. Design an AND gate using a 2:1 multiplexer.
5. Draw the graph of MOSFET.