Verification Lead

As a Verification Lead at our company, you will play a crucial role in leading the verification team on multiple projects. Your responsibilities will involve working closely with clients, sales/marketing, project managers, and design teams to plan and successfully deliver on commitments. You will be expected to implement and provide technical guidance to team members on various aspects of verification. Additionally, you will be responsible for guiding the team members on protocols, planning, and execution of error-related test scenarios. Key Responsibilities: - Lead verification team on multiple projects - Work closely with clients, sales/marketing, project managers, design teams to plan and successfully deliver on commitments - Implement and provide technical guidance to team members on various aspects of verification - Responsible for guiding the team members on protocols, planning and execution of error-related test scenarios Qualifications Required: - Experience and ability to lead a verification team - Strong SV, Classes, and UVM concepts - Ability to enforce strict code quality through code review - Ability to guide the team to deliver effective UVM based Verification plans, test plans, and testbench architectures - Strong understanding of functional coverage - One or more Protocol knowledge is a must (PCIe, CXL, Ethernet, DisplayPort, etc.) - Strong understanding of either of the interfaces (AXI, AHB, APB, etc.) - Strong understanding of constrained randomization in SystemVerilog - Good interpersonal skills - Good project planning and execution skills,