On-site
Part Time
We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems.
At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way.
Develop System Verilog/UVM-based testbenches for block-level and system-level verification.
Write and execute UVM test cases to verify functional correctness of RTL designs.
Perform detailed functional coverage and code coverage analysis, and drive coverage closure.
Debug simulation failures, root-cause issues, and work closely with design and verification teams for resolution.
Collaborate with cross-functional teams to ensure successful verification closure within project timelines.
Apply working knowledge of standard bus protocols such as AXI, APB, UART, and IJTAG for testbench development and debugging.
Document verification plans, test specifications, test reports, and maintain traceability.
Must have
4-6y exp
SV / UVM Test bench development and test cases coding
Code and Functional coverage analysis and closure
Work with team for verification closure
Bus protocols AXI / APB / UART/ IJTAG protocol working knowledge is an advantage.
Nice to have
Experience with python or any other scripting language is a plus
Languages
English: B2 Upper Intermediate
Seniority
Regular
Hyderabad, IN, India
Req. VR-115771
Other System Languages
Automotive Industry
09/07/2025
Req. VR-115771
Luxoft
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