Posted:3 months ago| Platform:
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Full Time
Position: Synthesis + STA Engineer Experience: 5+ yrs Qualification: B.Tech / B.E or M.Tech / M.E. Job Location: Bangalore Job Type: Permanent & Day Shift Responsibilities: Experience in handling complex data path oriented multi-million gate synthesis. Working Knowledge on Physical synthesis using tools like Genus, Fusion Compiler • Experience in developing constraints for multi-clock domains hierarchical/flat timing analysis • Good working knowledge in multi-power domain synthesis and structural power checks using CLP. • Hands-on experience in Formal verification along with strong debugging skills for resolving issues/aborts. • Good working knowledge in Pre-lyt STA and analyzing timing reports and generating timing ECOs • Good knowledge on analyzing trade-offs and recipes for timing/area/power/congestion. • Exposure in TCL scripting for usage in Synthesis/STA • Knowledge on Hierarchical STA with Hyperscale is a plus • Good team player. Need to interact with the stakeholders proactively • Ability to debug and solve issues independently Minimum Qualifications • Bachelors degree in engineering, Electronics, or related field. • 5 to 8 years Hardware Engineering experience or related work experience. We are looking out for candidates who can join 15 to 30 days notice max. Please share your updated profile to: ravindra.m@creenosolutions.com or you may reach out 83040937197
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