Staff Signal and Power Integrity Engineer

You will be working as a Staff Signal and Power Integrity Engineer at Lattice, based in India. Your role involves the following responsibilities and qualifications: **Role Overview:** At Lattice, you will be part of a dynamic team of engineers, designers, and specialists focused on developing cutting-edge programmable logic solutions. The company prides itself on its commitment to R&D, product innovation, and exceptional customer service. **Key Responsibilities:** - Perform pre-layout and post-layout simulation flow. - Conduct DC IR drop and AC impedance simulation. - Execute SI/PI/EMC design-optimization for chip/package/system integration. - Develop system integration design guidelines for advanced packaging technologies. - Create simulation models and methodology for SI/PI design. - Utilize simulation and lab data for design troubleshooting and improvement. - Collaborate with package design and testing teams for optimization. - Generate simulation reports with clear recommendations. **Qualifications:** - Must hold an MS or PhD in Electrical Engineering. - Minimum 5 years of recent Signal Integrity experience required. - Proficiency in package-level signal and power integrity. - Experience with signal integrity modeling tools such as Ansys HFSS and Agilent ADS. - Familiarity with signal and power integrity analysis tools. If you thrive in a fast-paced, results-driven environment and are keen on contributing to a team-first organization, Lattice offers an exciting opportunity for you to showcase your skills and expertise. You will be working as a Staff Signal and Power Integrity Engineer at Lattice, based in India. Your role involves the following responsibilities and qualifications: **Role Overview:** At Lattice, you will be part of a dynamic team of engineers, designers, and specialists focused on developing cutting-edge programmable logic solutions. The company prides itself on its commitment to R&D, product innovation, and exceptional customer service. **Key Responsibilities:** - Perform pre-layout and post-layout simulation flow. - Conduct DC IR drop and AC impedance simulation. - Execute SI/PI/EMC design-optimization for chip/package/system integration. - Develop system integration design guidelines for advanced packaging technologies. - Create simulation models and methodology for SI/PI design. - Utilize simulation and lab data for design troubleshooting and improvement. - Collaborate with package design and testing teams for optimization. - Generate simulation reports with clear recommendations. **Qualifications:** - Must hold an MS or PhD in Electrical Engineering. - Minimum 5 years of recent Signal Integrity experience required. - Proficiency in package-level signal and power integrity. - Experience with signal integrity modeling tools such as Ansys HFSS and Agilent ADS. - Familiarity with signal and power integrity analysis tools. If you thrive in a fast-paced, results-driven environment and are keen on contributing to a team-first organization, Lattice offers an exciting opportunity for you to showcase your skills and expertise.