Posted:3 months ago| Platform:
Work from Office
Full Time
A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills. KEY RESPONSIBLITIES: Synthesis of Complex IPs, constraint developement. Physical aware activty Floorplan,Placement,clock tree synthesis routing. Develop feedback to RTL team for physically driven microarchirtecture changes, Manage data for shared design across multiple projects. corrdintation with multiple SOC for complex IPs Lead team for junior team member,guide them and help techincal areas. PREFERRED EXPERIENCE: Understanding of Physical design and synthesis design cycle. 8+ experience in physical design and syntheis domain ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering/Electronics Engineering
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