227 Signal Jobs in Telangana - Page 8

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we transform how the world uses information to enrich life for all. The pace is fast, collaboration occurs on a regular basis, and innovation is expected. As a test platform development Engineer within the Non-Volatile Engineering (NVEG) Product Engineer team, you will develop and qualify low-cost in-house engineering test platforms and solve complex problems. This role requires deep understanding of test hardware and software along with NAND, UFS and PCIe protocol knowledge. You will be responsible to enable the PE test infrastructure and test platforms to test, debug and characterizing the NAND component and System products by closely working with the cross functional teams such as Test Engineering and System Integration, ASIC and FW teams and assist Qualification and Ramping of cutting-edge NAND and System Micron products. The candidate's responsibility is to design, develop and debug the VHDL or Verilog based application and have good knowledge of FPGA platform development lifecycle. Key Responsibilities Design, develop, and qualify product engineering test hardware, platforms, test firmware and software for non-volatile memory product bring up and debug. Develop efficient RTL design using Verilog or VHDL for FPGA implementation, ensuring optimal resource utilization. Drive complete FPGA design flow including synthesis, place and route, timing analysis and verification. Implement FPGA designs on hardware platforms using tools like Xilinx Vivado and optimize for performance, area and power and to create test bench and verification scripts. Debug and validate FPGA designs in hardware using tools such as oscilloscopes, logic analyzers, and signal tap. Optimize designs for speed, power, and resource usage based on the specific FPGA platform used. Collaborate with cross-functional teams, including Test Engineering & System Integration, ASIC, FW, Product Engineering and operations, to integrate FPGA designs with other system components. Provide engineering test solutions (HW & SW) for Product Development for NAND/System characterization and Silicon debug capabilities Drive and support new protocol enablement (SCA- Separate Command Address, ONFI, UFS, PCIe) and capability bring up Routinely communicate overall project status to leadership and cross functional product team Provide guidance through debug and resolution of product related issues Qualifications Successful candidates for this exciting opportunity will have: 9+ years of experience in RTL design, synthesis, timing closure, and verification methodologies. Knowledge of storage interface such as High Speed ONFI, UFS, PCIe, etc. Memory and Storage System behavior, architecture and design Working experience on NAND and non-volatile System products Experience with non-volatile memory, logic analyzers, oscilloscopes, and/or Automated Test Equipment (ATE) is preferred Experience working on firmware development using C/C++ and good understanding of scripting languages including TCL, Perl/Python. Familiar working on Unix/Linux terminal. Hands-on experience with hardware bring-up and debugging and Understanding of hardware schematic and layout. Excellent data analysis, problem solving, and decision-making skills Ability to work independently in a very fast paced environment and adapt to change Drive to determine root-cause and provide corrective action for product issues Self-motivated and enthusiastic in a challenging, dynamic environment Demonstrated ability to partner successfully with other groups to build strong peer relationships and achieve the best outcomes for Micron Education Position requires a minimum of a Bachelor's degree in Electrical, Electronics or Computer Engineering Course work in VLSI, semiconductor process is desirable, but not required About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and experienced Analog Design Engineer with a strong background in SerDes/High-Speed analog design. With a technical degree in Electrical Engineering or a related field, you possess a deep understanding of transistor-level circuit design and CMOS fundamentals. Your experience spans across various analog and mixed-signal building blocks, including equalizers, data samplers, voltage/current-mode drivers, serializers, LDOs, Bandgap, ADC/DAC, PLLs, and DLLs. You are adept at identifying and refining circuit implementations to achieve optimal power, area, and performance targets. Your ability to propose efficient design and verification strategies, coupled with your expertise in overseeing physical layout and minimizing parasitic effects, sets you apart. You thrive in collaborative environments, presenting simulation data for peer reviews and documenting design features and test plans meticulously. Your silicon-proven experience and consultative approach to electrical characterization within SerDes IP products make you an invaluable asset to our team. What You’ll Be Doing: Ensure analog sub-block performance adheres to SerDes standards and architecture document specifications. Identify and refine circuit implementations to achieve optimal power, area, and performance targets. Propose design and verification strategies that efficiently use simulator features to ensure highest quality design. Oversee physical layout to minimize the effect of parasitic, device stress, and process variation. Present simulation data for peer review. Ownership of analog and mixed-signal building block that is integrated as part of a larger SerDes design. Document design features and test plans. Consult on the electrical characterization of your circuit within the SerDes IP product. The Impact You Will Have: Contribute to the development of cutting-edge SerDes technologies that drive high-performance computing and communication systems. Enhance the overall performance and efficiency of our analog and mixed-signal designs, ensuring they meet industry standards. Improve the quality and reliability of our designs through meticulous verification and layout oversight. Support the seamless integration of analog and mixed-signal building blocks within larger SerDes designs. Drive innovation by identifying and implementing optimal circuit solutions for complex design challenges. Collaborate with cross-functional teams to deliver high-quality IP products that meet customer requirements. What You’ll Need: BTech or MS with 2+ years of SerDes/High-Speed analog design experience. Familiarity with transistor-level circuit design of fundamental analog and mixed-signal building blocks. Sound CMOS design fundamentals. Design experience with some of the following SerDes sub-circuits: equalizers, data samplers, voltage/current-mode drivers, serializers, LDOs, Bandgap, ADC/DAC, PLLs, DLLs. Who You Are: Detail-oriented and meticulous in your approach to design and verification. A strong communicator, able to present complex technical data clearly and concisely. Collaborative and team-oriented, thriving in a peer-review environment. Innovative and solution-focused, always seeking to optimize design performance. Proactive and self-motivated, with a passion for continuous learning and improvement. The Team You’ll Be A Part Of: Our team is dedicated to developing high-performance SerDes IP products that are integral to modern communication systems. We are a collaborative group of engineers who value innovation, quality, and continuous improvement. Together, we tackle complex design challenges, ensuring our solutions meet the highest industry standards and exceed customer expectations. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Join Amgen’s Mission of Serving Patients At Amgen, if you feel like you’re part of something bigger, it’s because you are. Our shared mission—to serve patients living with serious illnesses—drives all that we do. Since 1980, we’ve helped pioneer the world of biotech in our fight against the world’s toughest diseases. With our focus on four therapeutic areas –Oncology, Inflammation, General Medicine, and Rare Disease– we reach millions of patients each year. As a member of the Amgen team, you’ll help make a lasting impact on the lives of patients as we research, manufacture, and deliver innovative medicines to help people live longer, fuller happier lives. Our award-winning culture is collaborative, innovative, and science based. If you have a passion for challenges and the opportunities that lay within them, you’ll thrive as part of the Amgen team. Join us and transform the lives of patients while transforming your career. Associate IS –Safety ART - Signal & Risk Management What You Will Do Let’s do this. Let’s change the world. In this vital role you will join a collaborative team implementing and supporting the next generation of safety platforms and supporting technologies. In this role, you will focus on solving and resolving daily issues related to processing of data and files related to adverse events across multiple systems for case transmissions. You'll collaborate with others to ensure smooth data flow and quickly address problems, using your analytical skills to keep systems running efficiently. Roles & Responsibilities: Supervise daily data processes to identify and resolve issues where files are delayed or stuck. Tackle system and data reconciliation issues, collaborating with teams to resolve root causes and implement solutions. Work with various internal and external teams to address system dependencies and mitigate bottlenecks. Document and maintain records of recurring issues, proposed fixes, and preventive measures to improve process reliability. Collaborate with stakeholders to provide updates and ensure visibility in issue resolution. Develop and refine dashboards or reports to track system performance and file flow metrics. Participate in regular team meetings to discuss challenges, insights, and recommendations for process improvement. Responsible for ensuring that data is adhering to the KCI metrics on a regular basis Develop and implement test plans, scripts to validate system updates, patches and new deployments Identify and document system bugs or discrepancies, collaborating with developers or vendors to resolve them. Perform regression testing to ensure updates or fixes do not negatively impact existing functionalities. Automate repetitive testing processes and improve testing efficiency. What We Expect Of You We are all different, yet we all use our unique contributions to serve patients. The [vital attribute] professional we seek is a [type of person] with these qualifications. Basic Qualifications: Bachelor’s degree and 0 to 3 years of Life Science/Biotechnology/Pharmacology/Information Systems experience Or Diploma and 4 to 7 years of Life Science/Biotechnology/Pharmacology/Information Systems experience Preferred Qualifications: Must-Have Skills Strong analytical and problem-solving skills to diagnose and resolve system-related issues. Experience with data transfer processes and tackle stuck or delayed data files. Knowledge of testing methodologies and quality assurance standard processes. Proficiency in working with data analysis and QA tools. Knowledge of Validation of systems Good-to-Have Skills: Experience in Pharmacovigilance systems Experience with Signal or Risk Management platforms is a plus Knowledge or some experience in database programming languages such as Oracle SQL and PL/SQL Outstanding written and verbal communication skills, and ability to explain technical concepts to non-technical clients Sharp learning agility, problem solving and analytical thinking Knowledgeable in SDLC, including requirements, design, testing, data analysis, change control Professional Certifications (please mention if the certification is preferred or mandatory for the role): SAFe for Teams certification (preferred) Soft Skills: Able to work under minimal supervision Skilled in providing oversight and mentoring team members. Demonstrated ability in effectively delegating work Excellent analytical and gap/fit assessment skills Strong verbal and written communication skills Ability to work effectively with global, virtual teams High degree of initiative and self-motivation Ability to manage multiple priorities successfully Team-oriented, with a focus on achieving team goals Strong presentation and public speaking skills Shift Information: This position requires you to work a later shift and may be assigned a second or third shift schedule. Candidates must be willing and able to work during evening or night shifts, as required based on business requirements. What You Can Expect Of Us As we work to develop treatments that take care of others, we also work to care for your professional and personal growth and well-being. From our competitive benefits to our collaborative culture, we’ll support your journey every step of the way. In addition to the base salary, Amgen offers competitive and comprehensive Total Rewards Plans that are aligned with local industry standards. Apply now and make a lasting impact with the Amgen team. careers.amgen.com As an organization dedicated to improving the quality of life for people around the world, Amgen fosters an inclusive environment of diverse, ethical, committed and highly accomplished people who respect each other and live the Amgen values to continue advancing science to serve patients. Together, we compete in the fight against serious disease. Amgen is an Equal Opportunity employer and will consider all qualified applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability status, or any other basis protected by applicable law. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Experience – 4 to 7 Years in EM/IR/PDN Roles And Responsibilities Perform various electrical analyses at block and top levels, including static/dynamic IR, power/signal EM, and ESD Drive block and top-level electrical verification closure Develop power grid specs based on power/performance/area targets of different SOC blocks. Implement power grids in industry standard PnR tool environments. Work closely with the PI team to optimize the overall PDN performance. Work with CAD and tool vendors to develop and validate new flows and methodologies. Preferred Qualifications BS/MS/PhD degree in Electrical Engineering; 4+ years of practical experience In-depth knowledge of EMIR tools such as Redhawk and Voltus Experience in developing and implementing power grid Good knowledge of system-level PDN and power integrity Practical experience with PnR implementation, verification, power analysis and STA Proficient in scripting languages (TCL/Perl/Python) Experience with industry standard EMIR tools such as Redhawk and Voltus Basic knowledge of the physical design flow and industry standard PnR tools Experience with scripting languages such as TCL, Perl and Python Ability to communicate effectively with cross-functional teams Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3073521 Show more Show less

We're Hiring: AI DevOps Engineer – ML, LLM & Cloud for Battery & Livestock Intelligence 📍 Hyderabad / Remote | 🧠 3–8 Years Experience 💼 Full-time | Deep Tech | AI-Driven IoT At Vanix Technologies , we’re solving real-world problems using AI built on top of IoT data — from predicting the health of electric vehicle batteries to monitoring livestock behavior with BLE sensors. We’re looking for a hands-on AI DevOps Engineer who understands not just how to build ML/DL models, but also how to turn them into intelligent cloud-native services . If you've worked on battery analytics or sensor-driven ML , and you're excited by the potential of LLMs + real-time IoT — this is for you. What You’ll Work On 🔋 EV Battery Intelligence Build models for SOH, true SOH, SOC, RUL prediction , thermal event detection, and high-risk condition classification. Ingest and process time-series data from BMS, CAN bus, GPS , and environmental sensors. Deliver analytics that plug into our BatteryTelematicsPro SaaS for OEMs and fleet customers. 🐄 Livestock Monitoring AI Analyze BLE sensor data from our cattle wearables (motion, temp, rumination proxies). Develop models for health anomaly detection, estrus prediction, movement patterns , and outlier behaviors. Power actionable insights for farmers via mobile dashboards and alerts. 🤖 Agentic AI & LLM Integration Chain ML outputs with LLMs (e.g., GPT-4, Claude) using LangChain or similar frameworks . Build AI assistants that summarize events, auto-generate alerts, and respond to user queries using both structured and ML-derived data. Support AI-powered explainability and insight generation layers on top of raw telemetry. ☁️ Cloud ML Engineering & DevOps Deploy models on AWS (Lambda, SageMaker, EC2, ECS, CloudWatch). Design and maintain CI/CD pipelines for data, models, and APIs. Optimize performance, cost, and scalability of cloud workloads. ✅ You Must Have Solid foundation in ML/DL for time-series / telemetry data Hands-on with PyTorch / TensorFlow / Scikit-learn / XGBoost Experience with battery analytics or sensor-based animal behavior prediction Understanding of LangChain / OpenAI APIs / LLM orchestration AWS fluency: Lambda, EC2, S3, SageMaker, CloudWatch Python APIs Nice to Have MLOps stack (MLFlow, DVC, W&B) BLE signal processing or CAN bus protocol parsing Prompt engineering or fine-tuning experience Exposure to edge-to-cloud model deployment Why Vanix Technologies? Because we're not another AI lab — we're a deep-tech company building production-ready AI platforms that interact with real devices in the field , used by farmers, OEMs, and EV fleets . You’ll work at the intersection of: IoT + AI + LLMs Hardware + Cloud Mission-critical data + Everyday impact Show more Show less

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. General Summary: Responsibilities Front-End/Digital design implementation of Sensor/Mixed signal digital blocks RTL development and its validation for linting, clock-domain crossing, conformal low power and DFT rules. Work with SoC power management team for power sequencing requirements and system level considerations Work with functional verification team on test-plan development and debug. Develop timing constraints, deliver synthesized netlist to physical design team, and provide constraints support for PD STA. UPF writing, power aware equivalence checks and low power checks. DFT insertion and ATPG analysis for optimal SAF, TDF coverage. Provide support to SoC integration and chip level pre/post-silicon debug. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. Skills & Experience MTech/BTech in EE/CS with hardware engineering experience of 8+ years. Experience in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA. Experience with post-silicon bring-up and debug is a plus. Able to work with teams across the globe and possess good communication skills. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3068889 Show more Show less

Job Description Hardware Design Engineer Location- Hyderabad/ Pune. Notice period- Immediate Joiners Industrial automation domain - HW & FW- Look for Industrial domain. Please look for Hardware Design Engineer profiles in Industrial Automation Domain. 2-12 years of experience in hardware development and product design. Execute projects and tasks with a team of engineers (hardware, firmware, mechanical, test), including vendor coordination, supplier interactions, and procurement as needed for project purposes. managers - Drive teams of approximately 2-10+ hardware engineers. Skilled in full hardware development to production cycles. Expertise in mixed signal (ADC, DAC, grounding concepts), high-speed designs (memory interfaces, bus architectures, high-speed communication links), and analog electronics requiring low power, high accuracy interfaces to field sensors and transducers. Familiarity with industry standards for IO (4-20mA, HART, DI/DO, Universal IOs) and industrial standard communications (Ethernet/IP, EtherCAT, ModBus, CAN-FD, etc.). Excellent knowledge in designing analog circuits with different sensing designs using voltages, current, pressure, etc. Familiar with 32-bit/64-bit processor-based design, preferably NXP processors. Familiar with 32-bit/64-bit microcontroller-based design, preferably STM. Exposure to Memory devices (DDR, NAND, NOR, etc..) Experience in reverse engineering analysis. This is Contract role on third party payroll. Please apply if you are open to it. Skills Required RoleHardware Design Engineer - Multiple levels - Associate to Manager Industry TypeIT/ Computers - Software Functional AreaIT-Software Required EducationAny Graduates Employment TypeFull Time, Permanent Key Skills ADC DAC 32-BIT/64-BIT Other Information Job CodeGO/JC/21514/2025 Recruiter NameSPriya Show more Show less

Job Role: C++ Qt Developer Location: Hyderabad (Nacharam) (WFO) Experience level: 5 years Mandatory skills: Job Description: Web Application Developer - Qt Framework (Automation and Hardware Communication) Responsibilities: Develop and maintain a Qt-based web application for automating device control and communication (e.g., Signal Generators, Spectrum Analyzers, LRU, etc.). Automate command inputs to the hardware devices and capture test results programmatically. Integrate real-time communication between the application and the test equipment using protocols like Serial Communication (RS-232/RS-485) , TCP/IP , or specific APIs. Design a user-friendly web interface using Qt Web Engine or Qt Web Sockets, offering control over automation tasks, test management, and data visualization. Implement Excel export functionality to capture test results and save them in an organized manner using Qt's QAxObject or other third-party libraries like openpyxl . Work closely with hardware teams to ensure seamless integration with physical devices and troubleshooting issues related to device communication. Conduct extensive testing to validate the communication between hardware and software, ensuring accurate data collection and export. Collaborate with the team to document system functionality, provide end-user support, and resolve any technical issues. Optimize performance for real-time automation and data handling to ensure reliable operation during extended testing periods. Skills & Qualifications: Technical Skills: Qt Framework (C++/Qt) : Strong experience with the Qt framework, including Qt Web Engine for web-based applications and Qt WebSocket’s for real-time communication. Familiarity with Qt Widgets , QtQuick , and other components for UI development. Automation & Hardware Integration : Solid experience in automating communication with various hardware devices (e.g., Signal Generators, Spectrum Analyzers, etc.) via communication protocols like RS-232/RS-485 , TCP/IP , or vendor-specific APIs. Understanding of instrument control and automation of test procedures through custom scripts. Data Export & Reporting : Expertise in Excel file generation and automation , specifically using QAxObject , COM interfaces, or libraries such as openpyxl for Python or Excel Interop . Ability to structure data for reporting, making it easy for users to analyse the results. Real-Time Systems & Protocols : Experience in handling real-time communication, ensuring reliable data retrieval, error-handling, and performance tuning. Web Development : Knowledge of Qt WebEngine for web-based applications. Familiarity with HTML/CSS , JavaScript , or web frameworks would be an added bonus for advanced web interfaces. Software Engineering Practices : Version control systems such as Git . Familiarity with debugging tools and software testing methodologies. Experience & Qualifications: Education : Bachelor’s or Master’s Degree in Computer Science, Software Engineering, Electronics, or a related field. Equivalent work experience will also be considered. Experience : 5 -7 years of experience developing applications with Qt (C++). Proven experience with automation systems , especially in test automation or hardware communication (e.g., signal generators, spectrum analyzers, power sources). Experience working with Excel automation and reporting. Previous exposure to real-time data collection and handling of hardware communication. Preferred Qualifications: Knowledge of additional tools : Familiarity with tools like Python for automation, data analysis, or scripting. Experience with QtQuick and QML . Prior experience in embedded systems or working with industrial equipment . Show more Show less

Hardware Design Engineer Level- A/SA/M. Industrial automation domain - HW & FW- Look for Industrial domain. Please look for Hardware Design Engineer profiles in Industrial Automation Domain. Requesting to share one set of profiles by Today EOD. 2-12 years of experience in hardware development and product design. Execute projects and tasks with a team of engineers (hardware, firmware, mechanical, test), including vendor coordination, supplier interactions, and procurement as needed for project purposes. Drive teams of approximately 2-10+ hardware engineers. Skilled in full hardware development to production cycles. Expertise in mixed signal (ADC, DAC, grounding concepts), high-speed designs (memory interfaces, bus architectures, high-speed communication links), and analog electronics requiring low power, high accuracy interfaces to field sensors and transducers. Familiarity with industry standards for IO (4-20mA, HART, DI/DO, Universal IOs) and industrial standard communications (Ethernet/IP, EtherCAT, ModBus, CAN-FD, etc.). Excellent knowledge in designing analog circuits with different sensing designs using voltages, current, pressure, etc. Familiar with 32-bit/64-bit processor-based design, preferably NXP processors. Familiar with 32-bit/64-bit microcontroller-based design, preferably STM. Exposure to Memory devices (DDR, NAND, NOR, etc..) Experience in reverse engineering analysis. BOM optimization. Experience in designing, simulating, and verifying analog circuits such as operational amplifiers, data converters (ADC/DAC), voltage regulators, and filters. Hands-on experience in meeting industry standards and global compliance for EMI/EMC, functional safety, and incorporating design principles to meet IEC61000 standards, UL, and other safety and wireless compliance. Capable of hands-on design as well as independently performing design reviews of schematics, PCB, functional testing, pre-compliance, and certifications. Familiar with industry-wide tools for schematics and PCB (e.g., Cadence, Allegro). Perform detailed analysis needed for robust hardware designs (e.g., thermal, SI, EMC modeling, derating, reliability, xFMEAs). Independently guide teams to perform detailed circuit-level analysis and simulations using SPICE, MATHWORKS, etc. Show more Show less

Job Description & Requirements At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Our Solution IP group is ramping up high-performance computing (HPC) demand, therefore we are looking for an enthusiastic engineer to join our Methodology and Analog & Mixed-Signal Circuit Design team. You will be working with an immensely creative cross functional team of analog and mixed signal circuit designers from a wide variety of backgrounds on design and methodology. This position requires hands on experience and working knowledge of mixed signal circuit design best practices, an understanding of silicon IP release requirements, solid scripting skills to automate flows and the ability to drive and train engineers to become experts with new methodologies. Job Responsibilities: Develop and maintain circuit design methodology flows and documentation. Identify and refine circuit implementations to achieve optimal power, area and performance targets. Propose design and verification strategies that efficiently use simulator features to ensure highest quality design. Oversee physical layout to minimize the effect of parasitic, device stress, and process variation. Collaborate with digital RTL engineers on the development of calibration, adaptation and control algorithms for analog circuits. Present simulation data for peer and customer review. Mentor and Review the progress of junior engineers. Document design features and test plans. Required Qualifications: Bachelor with 2 years' experience or MSEE (or PhD) in Electrical Engineering, Computer Engineering, or similar technical field In-depth familiarity with transistor level circuit design - sound CMOS design fundamentals. Silicon-proven experience implementing circuits like bandgap references, voltage regulators. Detailed design experience with high custom logic design Experience optimizing FinFET CMOS layout to minimize the effect of parasitic resistance and capacitance, and to reduce the effects of local device mismatch and proximity effects. Awareness of ESD issues (i.e. circuit techniques, layout). and design for reliability (i.e. electro-migration, IR, aging, etc.). Experience with EDA tools for schematic entry, physical layout, and design verification. High proficiency with spice simulators including HSPICE, Finesim and XA Knowledgeable in Verilog-A and/or System-Verilog for analog behavioral modeling and simulation-control/data-capture. Plus Qualifications: Ability to provide automation for rapid and dynamic design needs is highly sought-after Experience with STA and cell characterization such as Nanotime, Primetime, SiliconSmart Experienced in STAR or similar extractor to debug extraction issues Extensive programming skills in languages such as Python, Perl, TCL and C/C++ Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled engineer with a strong foundation in analog and mixed signal integrated circuit design. You bring both theoretical knowledge and practical experience to the table, enabling you to contribute effectively to our fast-growing R&D team. With a background in transistor-level circuit design, CMOS fundamentals, and high-speed logic paths, you excel in a dynamic environment. Your expertise in timing analysis, characterization, and modeling sets you apart. You thrive in cross-functional teams, collaborating with diverse professionals from various backgrounds to achieve common goals. Your proficiency with IC design tools, along with your familiarity with scripting languages like TCL, Perl, C, Python, and MATLAB, makes you a valuable asset to our team. You are detail-oriented, possess excellent communication skills, and are accustomed to working in a globally diverse environment. What You’ll Be Doing: Direct and guide the activities of a team of engineers characterizing timing, analyzing timing results, and generating timing models of high-speed SERDES IP. Develop and align timing flow and methodology to ensure efficiency and quality of the team’s deliverables. Conduct design reviews and evaluate final results of timing views and reports. Present results of timing assessments or critical issue investigations and make recommendations for actions necessary to achieve desired results. Ensure the team follows processes for maximum design quality. Consult on the timing characteristics of the SerDes IP product and propose solutions for STA timing closure. The Impact You Will Have: Enhance the performance and reliability of high-speed analog integrated circuits through meticulous timing analysis and characterization. Contribute to the development of cutting-edge SERDES IP, driving advancements in high-speed data communication. Improve the efficiency and quality of deliverables through optimized timing flow and methodology. Ensure maximum design quality by adhering to established processes and best practices. Provide critical insights and recommendations to address timing issues and achieve desired results. Collaborate with cross-functional teams to deliver innovative solutions that meet the evolving needs of the semiconductor industry. What You’ll Need: MSc in Electrical Engineering or related field with 2 years of experience in IC design. Familiarity with transistor-level circuit design and CMOS design fundamentals. In-depth knowledge of setup and hold timing analysis. Experience in timing characterization, modeling, simulation, and verification. Familiarity with custom digital design (i.e., high-speed logic paths). Experience with timing tools such as Primetime, NanoTime, or equivalent. Hands-on experience with the physical layout of high-speed circuits is a plus. Knowledge of SPICE simulators and simulation methods. Proficiency in scripting languages such as TCL, Perl, C, Python, MATLAB. Who You Are: Detail-oriented and capable of conducting thorough analyses. Strong communicator with excellent documentation skills. Collaborative team player comfortable in a cross-functional, globally diverse environment. Creative problem solver with the ability to think critically and propose effective solutions. Adaptable and able to work at all levels of an organization. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative analog and mixed signal R&D team. Our team is dedicated to developing high-speed analog integrated circuits using the latest FinFET CMOS processes. We pride ourselves on our collaborative environment, where engineers from various backgrounds come together to drive technological advancements. Supported by an experienced software/CAD team, our design environment is best-in-class, equipped with a full suite of IC design tools and custom in-house tools. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and motivated Analog Design Engineer with a passion for developing cutting-edge technologies. You thrive in a collaborative environment and have a deep understanding of analog design fundamentals and device physics. Your experience with high-speed IO designs and advanced technologies positions you as a key contributor to our innovative projects. You possess excellent analytical and problem-solving skills, and your ability to execute circuit design tasks with precision and efficiency is unmatched. Your familiarity with ESD, reliability concepts, and JEDEC requirements for memory interfaces further enhances your expertise. You are an effective communicator with strong interpersonal skills, enabling you to work seamlessly with cross-functional teams across the globe. What You’ll Be Doing: Developing next-generation high-speed memory interface PHY IPs (DDR/HBM/UCIe) Executing projects in advanced technologies with a focus on analytical and problem-solving skills Designing high-speed IOs for memory interface PHY IP in CMOS/FinFET/GAA Collaborating with cross-functional teams globally to achieve project goals Ensuring product quality and efficiency in all design tasks Staying updated with the latest industry standards and technological advancements The Impact You Will Have: Driving the development of innovative high-speed memory interface PHY IPs Contributing to the integration of advanced capabilities in SoCs Enhancing the performance, power efficiency, and size optimization of target applications Reducing risk and accelerating time-to-market for differentiated products Collaborating with global teams to deliver high-quality products Setting industry benchmarks for advanced analog design technologies What You’ll Need: BTech/MTech degree in a relevant field 3+ years of experience in analog design fundamentals and device physics Proficiency in high-speed IO designs in advanced technologies Experience with ESD and reliability concepts Knowledge of JEDEC requirements for memory interfaces and standards Familiarity with signal integrity and/or power integrity is a plus Who You Are: An analytical thinker with strong problem-solving skills A collaborative team player with excellent communication and interpersonal skills Detail-oriented and capable of executing tasks with high precision and efficiency Adaptable and eager to learn new technologies and industry standards Passionate about innovation and technological advancements The Team You’ll Be A Part Of: You will be part of a dynamic team of highly competent technical experts focused on developing next-generation memory interface PHY IPs. Our team thrives on collaboration, innovation, and the pursuit of excellence. Together, we drive the integration of advanced capabilities into SoCs, enabling our customers to meet unique performance, power, and size requirements quickly and with reduced risk. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Job title : Pharmacovigilance Case MR Oversight Specialist Location: Hyderabad Opella is the self-care challenger with the purest and third-largest portfolio in the Over-The-Counter (OTC) & Vitamins, Minerals & Supplements (VMS) market globally . Our mission is to bring health in people’s hands by making self-care as simple as it should be . For half a billion consumers worldwide – and counting. At the core of this mission is our 100 loved brands , our 11,000-strong global team, our 13 best-in-class manufacturing sites and 4 specialized science and innovation development centers. Headquartered in France, Opella is the proud maker of many of the world’s most loved brands, including Allegra, Buscopan, Doliprane, Dulcolax, Enterogermina, Essentiale and Mucosolvan. B Corp certified in multiple markets , we are active players in the journey towards healthier people and planet. Find out more about our mission at www.opella.com. Main Responsibilities The primary function of the Case Medical Review (MR) Oversight specialist is to perform the medical and regulatory evaluation of all ICSRs. Oversee the Medical Review of ICSRs as per predefined activity and job-role in PV safety database (DB), with special focus on case medical accuracy and documentation. Maintain overall accountability for the timeliness and quality of medical Case Management activities outsourced to service providers. Be the product medical expert from Medical Review Standpoint for all High priority Products and provide training & guidance to MR teams Lead or participate in cross-functional projects or initiatives within global PV collaborates with the Global Safety Officer (GSO) in the review of clinical trial and post-marketing program documentation and on labeling activities. Establish strong collaboration with cross-functional groups within and outside the company (i.e. Business Partners, CRO). Provide or receive training on Customer-specific processes, systems, or products. Perform daily quality review for ICSRs to allow analysis of data entry/ quality. Reconcile SAEs between the Clinical and Safety DBs to meet joint accountabilities and enable locking of Clinical DB. Provide support for the preparation of response to ad hoc HA queries, provide input into responses to inquiries from health care professionals on safety issues. Assist in study configurations of clinicals trials in the safety database Responsible for performing oversight of non-serious line listing as applicable. Creates and maintains relevant SOPs, job aids for medical review activity. Other PV tasks as required Experience About you Experience in PV Databases like ARGUS, Aris-G (LSMV) VAULT Safety, etc. Minimum 4 years of pharmaceutical industry experience with a focus on pharmacovigilance Strong Experience in medical review of ICSRs Experience in labelling and causality assessments is must. Experience in overseeing vendors responsible for case processing. Experience with SDEA agreements Experience review in signal activities, RMP, PBRERS, and PADERS etc. Strong experience review of non-serious line listings. Experience and understanding of the safety/pharmacovigilance process and regulations, ICH GVP and GxP regarding systems validation and documentation Good knowledge of MS Office Strong experience in ICSR quality review and submissions Incumbent should have experience in Process Improvement practices Soft Skills Stakeholder management, Strong negotiation and communication skills, and ability to operate effectively in a global environment and across-line functions. Attention to details, Analytic, pro-active and effective problem-solving skills. Excellent organizational and project management abilities. Strong communication and interpersonal skills. Ability to work effectively in a cross-functional, multicultural environment. Think strategically and lead teams. Excellent team-work and interpersonal skills Ability to work in cross-functional teams Excellent oral and written communication skills Strong communication and interpersonal skills. Ability to work effectively in a cross-functional, multicultural environment. Think strategically and lead teams. Technical Skills Regulatory Standards: In-depth knowledge of global pharmacovigilance regulations and guidelines, such as those from the FDA, EMA, ICH, and other health authorities. Knowledge of how adverse events are reported and classified (e.g., by severity, outcome) and the regulatory requirements surrounding these reports Safety Reporting Requirements: Knowledge of regulatory requirements for safety reporting (e.g., CIOMS forms, EudraVigilance, FDA REMS, etc.) and experience in ensuring compliance with these standards. Good Pharmacovigilance Practices (GxP): Familiarity with GxP guidelines, ensuring that all pharmacovigilance processes adhere to industry standards. Database Management: Familiarity with safety databases and systems (e.g., Aris-G / LSMV, Argus Safety, VigiBase, or similar systems) used for collecting, analyzing, and reporting adverse event data. Microsoft Office Suite: Advanced skills in Excel (for data analysis and reporting), Word (for report writing), and PowerPoint (for presenting findings) Education MD (Pharmacology) degree with 2 years' experience required / or MBBS/Pharm D equivalent Academic qualification is desirable with 4 years’ experience in Global PV/Clinical environments. Languages : Fluent in English (verbal and written) Why us? At Opella, you will enjoy doing challenging, purposeful work, empowered to develop consumer brands with passion and creativity. This is your chance to grow new skills and be part of a bold, collaborative, and inclusive culture where people can thrive and be at their best every day. We Are Challengers: We are dedicated to making self-care as simple as it should be. That starts with our culture. We are challengers by nature, and this is how we do things: All In Together: We keep each other honest and have each other's backs. Courageous: We break boundaries and take thoughtful risks with creativity. Outcome-Obsessed: We are personally accountable, driving sustainable impact and results with integrity. Radically Simple: We strive to make things simple for us and simple for consumers, as it should be. Join us on our mission. Health. In your hands. www.opella.com/en/careers Show more Show less

About the Company: Olympus Corporation is a globally renowned leader in endoscopy enabled healthcare, pioneering innovative solutions that enhance people's lives every day. With a rich history spanning nearly a century, Olympus has continuously pushed the boundaries of what's possible in the realms of medical, scientific, and imaging technology. Since its inception, Olympus has remained committed to its founding principles of integrity, innovation, and quality. Over the years, the company has diversified its portfolio, excelling in various fields including endoscopy, microscopy, life sciences, and digital imaging. Purpose of the Role: The Staff Embedded Software Engineer will focus on the technical execution of embedded software development projects within Olympus. Reporting to the Associate Director, this role emphasizes technical leadership while maintaining some project management responsibilities. The individual will collaborate closely with PMO to drive the design, development, and troubleshooting of embedded software systems for medical devices. This position will take charge of strategic technical oversight, particularly in vendor partner management, ensuring high-quality engineering outcomes and adherence to regulatory standards such as FDA Design Controls. While contributing to project planning and delivery, the focus will be on leading technical initiatives, ensuring alignment with the broader R&D strategy and offshore operational goals. The role requires proactive liaison with internal teams and external partners to maintain seamless coordination and ensure the timely achievement of project milestones. Key Responsibilities: NPD and Stakeholder Management: Lead hands-on development and execution of embedded software, driving the implementation of complex systems from concept through to production, with a focus on achieving performance, reliability, and regulatory compliance in every phase Perform detailed design reviews with internal teams and vendor partners, offering technical expertise to refine embedded software architectures and ensuring they meet all Olympus R&D objectives Oversee the design, development, and deployment of embedded software and firmware for medical devices Ensure the integration of embedded systems with hardware components, sensors, user interfaces, and communication protocols Lead the development of real-time, safety-critical systems with a focus on reliability, efficiency, and performance Implement advanced embedded software engineering techniques and embedded systems validation. Collaborate with cross-functional teams (mechanical, hardware, and systems engineers) to ensure seamless integration of embedded software into overall product architecture and meet system-level requirements Provide technical mentorship to junior engineers and vendor partners, ensuring that best practices are followed and that technical decisions are aligned with Olympus’ long-term innovation strategies Ensure seamless communication of technical updates between stakeholders, including Olympus global teams, regulatory bodies, and vendor partners, focusing on detailed compliance and technical specifications Develop and validate test protocols for embedded software, ensuring designs are robust, reliable, and scalable while adhering to safety and regulatory standards Project Management: Lead technical tracking of project progress, developing detailed Gantt charts and project plans that map out technical milestones, dependencies, and resource needs for software R&D activities Coordinate with the PMO teams to ensure technical objectives are aligned with project timelines, adjusting designs and technical approaches to mitigate risks or delays Create and manage technical resource plans, ensuring that internal engineering teams and vendor partners have the tools, talent, and resources required to meet demanding project timelines Proactively troubleshoot and resolve technical challenges, leveraging advanced engineering methodologies like root cause analysis (RCA), failure mode effect analysis (FMEA), and reliability testing to resolve bottlenecks Support RAID management by identifying and documenting key technical risks, ensuring that each risk has an associated mitigation plan grounded in strong engineering fundamentals Provide in-depth technical reports to the PMO on project progress, focusing on design validation, testing outcomes, technical issues encountered, and proposed engineering solutions Oversee technical escalations, ensuring that all technical roadblocks are swiftly identified and addressed, with proposed solutions backed by solid technical rationale Practice Development: Lead technical setup of development tools and workflows, including implementing software for embedded systems, debugging tools, and testing protocols for streamlined development within the function Develop and oversee technical processes, including change control, design reviews, and prototype testing, ensuring the function operates with cutting-edge engineering efficiency Establish advanced testing and validation protocols, ensuring that all embedded software developed in the function meets high standards for performance, durability, and compliance Direct hands-on debugging and software validation, focusing on early-stage system validation, software integration, and design tuning to meet evolving project needs Drive continuous improvement initiatives to optimize technical workflows, reduce development cycles, and improve overall engineering output quality by integrating feedback from testing and real-world results Ensure all software designs meet global regulatory and safety standards, working closely with regulatory bodies and certification teams to ensure the function’s output aligns with industry regulations Manage technical knowledge-sharing sessions within the function, facilitating the exchange of embedded software know-how between internal teams and external vendor partners to elevate the overall technical skill set Regulatory & Compliance: Support the Associate Director in ensuring product development aligns with regulatory and industry standards, including FDA, CE, ISO, and other relevant certifications Assist in engaging with external teams and certification bodies to ensure compliance with applicable safety standards Help maintain documentation in accordance with Good Manufacturing Practices (GMP) and quality system regulations Risk Management & Problem-Solving: Work with the team to identify technical risks and support the development of mitigation strategies Provide input and technical support to address engineering challenges throughout the product development process Person Specification: Education A degree or higher qualification in Computer Science Engineering from a recognized university. Master's in computer Science Engineering will be an added advantage. Experience 10+ years of experience in embedded software development, with a mix of technical and managerial responsibilities Proven experience in collaborating with PMOs and global teams on embedded software engineering projects Strong technical background in embedded software and firmware development Experience in medical device development is preferred Skills Strong technical expertise in embedded systems engineering, including hands-on experience in R&D and/or sustaining engineering, especially in product development environments Experience working with vendor partners on R&D projects, assisting in performance tracking, SLA monitoring, and supporting demand planning to ensure alignment with project requirements Strong experience in developing embedded software and firmware for medical devices, including real-time operating systems (RTOS) and safety-critical systems Proficient in programming languages such as C, C++, and assembly, with expertise in low-level hardware interaction and device drivers Strong understanding of microcontroller, microprocessor, and digital signal processing (DSP) architectures Experience with wireless communication protocols (e.g., Bluetooth, Wi-Fi) and cybersecurity in medical devices Familiarity with medical device product lifecycle management, with experience in applying FDA Design Controls and international standards (e.g., 820-CFR, ISO14971, IEC62304), ensuring compliance with project-specific regulations Experience in supporting project and program management efforts, with a focus on managing day-to-day vendor partner interactions, driving continuous improvement in engineering processes, and contributing to team growth Comfortable working in Agile SCRUM and stage-gate environments, ensuring collaboration with cross-functional teams to meet project objectives Ability to develop and contribute to design documentation, including source code documentation, technical specifications, and compliance records for manufacturability and quality assurance Knowledge of real-time systems, software development and device drivers, contributing to design solutions to mitigate risks Understanding of software lifecycle management, software verification, and validation for embedded systems, including experience with managing design for reliability and scalability Experience with requirements management systems contributing to risk analysis and DFMEA processes in embedded software R&D projects Effective stakeholder management skills, collaborating with PMO teams to ensure technical alignment and timely project delivery Experience working with project data, contributing to technical assessments and identifying opportunities for process improvements and operational efficiency Strong communication skills, with the ability to present technical updates and information clearly to cross-functional teams and stakeholders Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Services Group, Engineering Services Group > PWB Design General Summary The successful candidate will operate as a member of the Corporate Engineering unit, PWB CAD department, and will be able to provide PWB design solutions for a variety of design types. For example: Product Test Engineering (PTE) designs - (UFLEX/IFLEX Probe cards, 93K DIB, Bench boards and Daughter Cards, Socketed and Solder down, HTOL, etc.) with multiple DUT sites up to 32X. Emulator designs - large/high density digital designs having high layer counts (24-34 layers) and containing several FPGA's (>1500 pins) along with very high-speed digital signals. Reference handset designs - 'form factor accurate' (FFA) circuit boards. These boards require mastery in digital processors, RF and radio circuits as well as power control devices. Experience with micro-vias (stacked), sequential lamination stack-ups and design rules using .5mm pitch and smaller packages. Responsibilities include working with US and India teams to provide PWB design solutions for high performance electronic assemblies for Mobile, Modem and IOT. Specific tasks include daily use of PWB CAD design software to perform placement and routing activities to meet mechanical and electrical design constraints and requirements. Exchange of electronic file transfers to/from mechanical and electrical engineers to ensure compliance to fit, form and function as well as power and signal integrity requirements. Creating fabrication and assembly drawings and working with internal teams and external suppliers to support PWB fabrication and assembly. The candidate will interface with internal staff and outside partners in the fast-paced execution of a variety of multi-disciplined projects. Leadership skills are expected on all projects to help direct, capture and interface with outside consultants. The candidate is expected to have proficiency on Mentor Xpedition, Mentor PADS and Cadence Allegro PWB design software and is expected to have multiple years of experience in developing PWB design solutions for a variety of design types and working with internal teams and external suppliers to support PWB fabrication and assembly. Minimum Qualifications Associate's degree in Electrical Engineering, Computer Science, Mathematics, or related field and 5+ years of PCB layout handling or related work experience. OR High School diploma or equivalent and 7+ years of PCB layout handling or related work experience. 6-9 years actively involved in PWB design for high-density electronics packaging. 6-9 years experience in a PWB design role designing consumer-grade mobile phones utilizing latest generation processor chips. Design for Manufacture (DFM) analysis experience utilizing Valor and/or CAM350 tools. Design experience: RF, Analog, High-speed digital circuits - DDR2, 3 & 4, HDMI, PCIe, SATA, MIPI, USB 2,3.x, GigE, ATE Platforms: 93K, uFlex and iFlex. Expected to possess a strong understanding and demonstrated application of PWB design principles, practices and standards. Able to perform complex and difficult PWB design tasks requiring extensive skill and knowledge of fabrication and assembly process capabilities and limitations. Develops solutions to a variety of complex problems and proposes PWB design trade-offs to the engineering design team for resolution and implementation. Determine PWB design trade-offs necessary to meet design requirements and produce high quality cost effective PWBs that meet schedule objectives. Understands the requirements driving PWB technology and process trends and their application to Qualcomm designs. Maintain technical coordination with Engineering and Manufacturing. Resolve PWB design issues with fabrication and assembly vendors. Participate and provide input into process improvement, PWB and DFM checklists and guidelines. Participates in determining objectives of assignment and plans, schedules and arranges own activities in accomplishing objectives. Experience working with on-board EMI shielding cans. Experience with IDF/EMN file exchange between mechanical and HW teams. Understands project goals and individual contribution toward those goals. Effectively communicates with project peers and engineering personnel via e-mail, web meetings, and instant messaging including status reports and illustrative presentation slides. Interact and collaborate with other internal PWB designers for optimal product development processes and schedule execution. Effectively multitasks and meets aggressive schedules in a dynamic environment. Prepare and deliver design reviews to project team. Possess excellent verbal and written communication skills. Leadership skills to help direct, prioritize, and clearly set project tasks per schedule. Communicate milestones and directions to outside team members. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075691 Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and skilled ASIC Digital Design Engineer with a strong foundation in both analog and digital CMOS circuit designs. You thrive in dynamic environments and are adept at working with Verilog/System Verilog languages and methodologies such as VMM and UVM. You have a knack for writing and modifying test cases, checkers, and scoreboards within a system Verilog-based test environment. Your expertise extends to AMS verification, particularly in high-speed SerDes designs supporting multi-protocols. Familiarity with Synopsys analog mixed-signal design tools and modeling languages like Verilog-A/AMS is a plus. You are proficient in programming/scripting languages like TCL, Perl, and Python, and have experience working with Linux. Your excellent communication skills and ability to take ownership of projects ensure that you meet deadlines and exceed expectations. Self-organization is second nature to you, allowing you to manage time effectively and contribute meaningfully to your team's success. What You’ll Be Doing: Defining and developing ASIC RTL design and verification at both chip and block levels. Writing and modifying test cases, checkers, and scoreboards in a system Verilog-based test environment. Collaborating with cross-functional teams to ensure seamless integration of analog and digital components. Conducting AMS verification, particularly for high-speed SerDes designs supporting multi-protocols. Utilizing Synopsys analog mixed-signal design tools for efficient design and verification processes. Programming and scripting using TCL, Perl, and Python to automate and streamline workflows. The Impact You Will Have: Enhancing the performance and reliability of our high-performance silicon chips. Contributing to the development of innovative technologies that drive the Era of Pervasive Intelligence. Improving the efficiency and effectiveness of our design and verification processes. Ensuring the seamless integration of analog and digital components in our products. Supporting the creation of cutting-edge solutions for self-driving cars, learning machines, and more. Driving continuous technological innovation within Synopsys and the broader industry. What You’ll Need: Looking for 2+yrs experience with BTech / MTech in VLSI / Electronics/ Microelectronics Knowledge or hands-on expertise/analysis of Analog and digital CMOS circuit designs Knowledge on electrical circuit networks and analysis Knowledge or hands-on Verilog/System Verilog languages and supported methodologies like VMM, UVM Must be able write/modify testcases, checkers, scoreboards in a system Verilog based test environment AMS verification experience in high speed Serdes designs supporting multi-protocols is an advantage. Experience with the Synopsys Analog mixed-signal design tool set is an advantage. Modelling languages Verilog-a/ams can be an advantage Programming/scripting know-how e. g. tcl, perl, python Experience with Linux Good communication skills, ability to take ownership Self-organized to ensure that project timescales are met Who You Are: Excellent communicator with strong interpersonal skills. Proactive and able to take ownership of projects. Self-organized and capable of managing time effectively. Collaborative team player who thrives in a dynamic environment. Detail-oriented and committed to delivering high-quality results. The Team You’ll Be A Part Of: You will join a dynamic team of engineers focused on pushing the boundaries of ASIC digital design and verification. Our team values collaboration, innovation, and continuous improvement, working together to create cutting-edge solutions that drive the future of technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SENIOR SILICON DESIGN ENGINEER The Role AMD is looking for an experienced Analog Mixed Signal engineer to take on the technical challenges within the I/O and PHY Technology Group. This group delivers critical Mixed Signal IP such as highly configurable high-speed memory I/Os/PHYs and Chiplet Interconnect IP (e.g. UCIE) to various Business Units/SoCs within AMD. The ideal candidate will get to work with circuit and FE architects to accurately model the analog digital interface boundary of high speed mixed signal IPs to accomplish timing integrity goals. Key Responsibilities Analyze timing constraints for complicated static timing analysis (STA) paths including multistage generated clocks, ZCPs in a variety of mixed signal circuits. Use the appropriate margining methodology for data, clock and async timing paths to improve timing robustness and reliability. Identify noise sources in timing models and feedback to CKT and LAY for appropriate design fixes. Adopt leading industry STA and Timing Char tools to drive timing convergence in mixed signal IP development. Use scripting skills to meet efficiency and quality goals across all timing workflows. Derive best design guidelines for optimal signaling performance that result in minimal skews and insertion delays for various types of data interfaces and clock propagation. Prepare, analyze and report on data integrity and consistency within the macro timing model using spice correlation and data analytics. Preferred Experience 6+yrs experience in high-speed 10+Gbps serial and/or parallel analog PHY/IO designs. Experience in FinFet advanced CMOS process nodes with a solid understanding of transistor device performance and fundamentals. Timing closure and Timing char using PrimeTime and NanoTime STA tools is a must. Proficiency in using spice based extraction and simulation tools. Very good understanding of SOC and Custom flows including physical design and IR drop. Strong communication skills with ability to comprehend and present technical ideas & reports across different teams and geographies. Strong analytical and problem-solving skills including the ability to root cause and debug in a fast-paced environment. Possess sound fundamentals and knowledge of analog mixed signal circuits timing collaterals and constraints. Academic Credentials Bachelors or Masters degree in computer engineering/Electrical Engineering Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

Sandoz continues to go through an exciting and transformative period as a global leader and pioneering provider of sustainable Biosimilar and Generic medicines. As we continue down this new and ambitious path, unique opportunities will present themselves, both professionally and personally. Join us, the future is ours to shape! The Medical Safety Lead, Sandoz in close collaboration with Medical Safety Team Lead/the Global Program Safety Lead (GPSL) Biopharma/Head Medical Safety Sandoz provides robust safety evaluation expertise for assigned products in order to improve patients’ lives and impact on overall Sandoz results. As a member of the Medical Safety organization, prioritizes the safety of patients, ensures optimal patient safety for assigned compounds and shares responsibility for the integration, analysis, and evaluation of internal and external safety information through product lifecycle management. Roles and responsibilities. Owns the safety strategy of the assigned products and ensures ongoing evaluation of the overall safety profile, serving as the medical safety representative for Risk Management Plans (RMPs), Periodic Safety Update Reports (PSURs), Annual Product Quality Reports (APQRs) and medical risk assessments (MRAs). Preparation/review of investigator notifications and periodic medical assessments for ethics committees Medical review of single case reports according to business needs (example SUSARs). Review safety documents prepared by External Service Providers. Performs medical assessment of product quality defects with or without adverse events, including the review of line listings whenever required and proposes relevant market action. Monitoring and evaluation of all safety signals both from internal and external sources including literature sources, single cases and/or aggregate data and presents the assessment to the Sandoz Safety Management Team/ Governance Board / other internal/external boards as needed. Prepares safety responses to inquiries from regulatory authorities, health care professionals or legal queries on the benefit-risk balance of assigned products. Supports Country Organization and other stakeholders on safety related questions when global input is required. Depending on assigned products and portfolio, may support the GPSL/Medical Safety Group Lead and the Senior Medical Safety Lead in submission activities as required by providing pharmacovigilance inputs to initial development and updates of core data sheet (CDS) and its related documents. In this context, the Medical Safety Lead may deputize for the Senior Medical Safety Lead for the preparation of safety documents (e.g. summary of clinical safety, clinical overview) for review by GPSL. Lead/Review the authoring of pharmacovigilance cumulative reviews/clinical overviews to support initial submissions and updates of the company core data sheet (cCDS)/ Safety labels. Provides guidance as appropriate to Case processing team for the coding and causality/expectedness assessment of adverse event reports as and when needed. Provides inputs and collaborates on preparation of Safety Profiling Plan (SPP).Provides safety inputs for clinical and regulatory deliverables including but not limited toclinical study protocols (e.g. - PASS, consortia studies etc.), clinical study reports, investigator brochure and safety management plans. Collaborates productively on clinical safety tasks with colleagues from Clinical Development, Regulatory Affairs, Medical Affairs, Medical Information, Statistics, Safety Data Management, and other related departments. Provides relevant inputs for Global Program/Brand Team (GPT/GBT), Global Clinical Team (GCT), and Clinical Trial Team (CTT) meetings as needed depending upon the portfolio and products assigned. What you’ll bring to the role: 10+ years of experience in PSUR, RMS , aggregate Report writing and Signal Management You’ll receive: Breakdown of benefits received in this role. Include flexible working, learning and development opportunities as well. Why Sandoz? Generic and Biosimilar medicines are the backbone of the global medicines industry. Sandoz, a leader in this sector, provided more than 900 million patient treatments across 100+ countries in 2024 and while we are proud of this achievement, we have an ambition to do more! With investments in new development capabilities, production sites, new acquisitions, and partnerships, we have the opportunity to shape the future of Sandoz and help more patients gain access to low-cost, high-quality medicines, sustainably. Our momentum is powered by an open, collaborative culture driven by our talented and ambitious colleagues, who, in return for applying their skills experience an agile and collegiate environment with impactful, flexible-hybrid careers, where diversity is welcomed and where personal growth is supported! Join us! #Sandoz Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering Responsibilities General Summary: Defining chip and macro level power domains System Level Power Modeling Mixed signal power analysis Power Island/Power Gating/Power Isolation Structural Low power design of level shifter and isolation cell topology and associated rules Architectural analysis and development of digital power optimization logic/circuits/SW Work with Power Management IC developers for power grid planning Creating detailed architecture and implementation documents Education Requirements Required: Bachelor's, Computer Engineering and/or Electrical Engineering Preferred: Master's, Computer Engineering and/or Electrical Engineering Work with cross-functional teams on SoC Power and architecture for mobile SoC ASICs. Skills/Experience At least 4-12 years of experience are required in the following areas: Low power intent concepts and languages (UPF or CPF) Power estimation and reduction tools (PowerArtist/PTPX,Calypto) Power dissipation and power savings techniques- Dynamic clock and voltage scaling Power analysis (Leakage and dynamic) and thermal impacts Power Software features for power optimization Voltage regulators including Buck and Low Drop out ASIC Power grids and PCB Power Distribution Networks Additional Skills In The Following Areas Are a Plus Mobile Baseband application processors chipset and power grid understanding UPF-based synthesis and implementation using Design Compiler Structural low power verification tools like CLP or MVRC Outstanding written and verbal communication skills Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3074297 Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned engineer with a passion for cutting-edge analog design. Your extensive experience with high-speed interfaces, particularly PCIe 6 and PCIe 7 or SerDes PHY designs, positions you as a technical leader in the field. You possess a deep understanding of transistor-level design and have a proven track record of successfully developing high-speed analog building blocks such as LDOs, Bandgap references, ADC/DAC, PLLs, and DLLs. Your expertise in CMOS technologies, including finFET and SOI processes, and your strong background in jitter budgeting analysis make you an invaluable asset to any team. You are adept at collaborating with cross-functional teams, mentoring junior engineers, and ensuring that designs meet stringent performance, power, and area targets. Your ability to oversee the porting of PHY designs to different technology nodes, while maintaining signal integrity and performance, demonstrates your versatility and commitment to excellence. What You’ll Be Doing: Lead the architecture and development of analog/mixed-signal blocks for PCIe 6 and PCIe 7 PHY designs. Ensure designs meet PCIe protocol standards, optimizing for performance, power, and area targets. Oversee the porting of PHY designs to different technology nodes, maintaining signal integrity and performance. Collaborate with cross-functional teams to integrate analog circuits into larger SerDes PHY systems. Develop and implement verification strategies for high-speed analog/mixed-signal circuits using advanced simulation tools. Supervise physical layout to minimize parasitics, device stress, and process variation impacts. Review simulation and measurement data for design validation and compliance with PCIe standards. Provide technical leadership and mentorship to junior engineers in analog/mixed-signal design best practices. Document design features, specifications, test plans, and methodologies for future reference. Collaborate with the characterization team to validate the electrical performance of circuits in silicon. The Impact You Will Have: Drive the development of next-generation PCIe 6 and PCIe 7 PHY designs, contributing to the advancement of high-speed interface technology. Ensure that Synopsys' analog/mixed-signal circuits meet stringent industry standards, enhancing the company's reputation for excellence. Facilitate the seamless integration of analog circuits into complex SerDes PHY systems, improving overall system performance. Mentor and develop junior engineers, fostering a culture of continuous learning and innovation within the team. Contribute to the successful porting of PHY designs across different technology nodes, ensuring versatility and adaptability. Enhance the company's design verification processes, leading to more robust and reliable high-speed analog/mixed-signal circuits. What You’ll Need: PhD with 5+ years, or MTech/MS with 10+ years of experience in analog/mixed-signal circuit design, with a focus on high-speed interfaces such as PCIe 6/7 or SerDes PHY designs. Extensive experience in transistor-level design of high-speed analog building blocks, such as LDOs, Bandgap references, ADC/DAC, PLLs, DLLs. Proven silicon experience in developing PHY circuits that meet strict PCIe standards. Expertise in high-speed SerDes AFE (Analog Front-End) development, including CTLE and CDR design. Experience designing high-speed SerDes transmitters, with in-depth knowledge of equalization techniques (e.g., DFE, FIR filters, TX pre-emphasis). Strong background in jitter budgeting analysis, including understanding the sources of jitter and strategies for minimizing its impact on signal integrity. Extensive experience with the porting of PHY designs across different technology nodes. Strong expertise in CMOS technologies, including finFET and SOI processes. In-depth understanding of the PCIe protocol, signal integrity requirements, jitter performance, and high-speed clocking. Proven ability to supervise layout design to minimize the effects of parasitics, process variations, and electromigration. Demonstrated ability to lead and mentor design teams, working across departments to ensure successful project outcomes. Who You Are: You are a collaborative and innovative problem solver with a keen eye for detail. Your strong communication skills enable you to effectively convey complex technical concepts to both technical and non-technical stakeholders. You are proactive, taking initiative to drive projects forward and overcome challenges. Your passion for continuous learning keeps you at the forefront of technological advancements, and your mentorship helps to cultivate a dynamic and skilled team. The Team You’ll Be A Part Of: You will join a highly skilled and dynamic team of engineers dedicated to pushing the boundaries of analog and mixed-signal design. Our team is focused on developing cutting-edge PCIe PHY designs, ensuring that they meet the highest standards of performance and reliability. Collaboration and innovation are at the core of our team's values, and we thrive on solving complex challenges together. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

In this role, you will work on the design, development, and refinement of Multi-Gbps NRZ & PAM4 SERDES IP. You will be part of a fast-growing analog and mixed signal R&D team developing high speed analog integrated circuits in the latest FinFET process nodes. Working from SerDes standards to block specifications, you quickly identify potential circuit architectures and successful design strategies. You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team Experience in design of Charge-pump PLLs, Fractional-N PLLs, DLL design techniques, LDO design techniques Hands-on experience on designing charge pumps, LC VCOs, Ring oscillators, phase interpolator, bandgap reference, etc. In depth familiarity with transistor level circuit design at SPICE netlist level and should be capable to develop SPICE verification testbench Design exposure in advanced process nodes (FinFETs) Hands on experience with industry standard tools (Cadence, Synopsys, Mentor) for schematic capture spice simulations. Familiarity with automation / Scripting language (TCL, Python, PERL). Experience optimizing CMOS layout to minimize the effect of parasitic resistance and capacitance, and to reduce the effects of device mismatch and proximity effects. understanding of ESD issues and reliability issues Looking for 1-2 years of experience in Analog design with master's degree or 2-4 years of experience in in Analog design with bachelor's degree In depth familiarity with transistor level circuit design - sound CMOS design fundamentals. Silicon-proven experience implementing circuits for the PLL within Highspeed SerDes Show more Show less

A&MS Layout Engineer for the Analog and Mixed Signal IP group developing physical layout of High Speed Analog Integrated Circuits. You will be working in a team of Analog/Mixed Signal Custom Layout Design Engineers who will be working on the SerDes and Analog Mixed Signal IP blocks. You are expected to coach junior members in the team and also use innovative approaches when drawing layout so that it helps the layout to be ported easily between different process nodes. To be successful in the role, you should be able to develop and maintain schedules while being proficient in understanding the complexities involved in High Speed Analog Layout design. Receives little to no instructions on day-to-day work, occasionally receives general instructions on new assignments and projects. Determines and develops approach to solutions. Work is independent and collaborative in nature. Provides regular updates to manager on project status. Frequently networks with senior internal and external personnel in own area of expertise. You should also have a strong desire to learn and explore new technologies while demonstrating good analysis and problem solving skills. Prior knowledge and experience in CAD tool usage is a must; specifically, Custom Designer/Cadence Virtuoso, Calibre, ICV, Hercules, STAR-RXCT. Desired Skills: In depth familiarity with layout of analog and mixed signal CMOS circuits Exposure to Analog/Mixed Signal circuit layout (i.e RX, TX, PLL, etc..) Familiarity with Custom digital layout (i.e high speed logic paths) Aware of layout techniques to mitigate ESD, latchup Knowledge of layout effects (like matching, proximity effects etc) Knowledge of design for reliability (i.e EM, IR etc..) Knowledge of rules for advanced technology nodes across multiple foundries (SEC, TSMC, GF, Intel) Knowledge of DFM Rules for advanced technology nodes (16nm and below) Strong debugging, analytical and trouble shooting skills Excellent documentation and communication skills Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and experienced Layout Design Engineer with a strong background in transistor level analog and mixed signal layout. You thrive in dynamic environments and possess a deep understanding of device-level floor planning, placement, routing, and physical verification processes. You excel at troubleshooting and resolving physical verification issues to achieve clean and desired results. Your ability to create and review layout documents ensures that quality standards are met, and deliverables are on time. You are passionate about learning and exploring new techniques, and you effectively communicate with cross-functional teams to ensure successful project execution. With a strong foundation in electrical and electronic fundamentals, semiconductor device physics, and CMOS fabrication technology, you bring valuable expertise to the team. What You’ll Be Doing: Design and develop transistor-level analog and mixed signal layouts. Perform device-level floor planning, placement, routing, and physical verification. Troubleshoot and resolve physical verification issues to achieve clean results. Create and review layout documents to ensure they meet quality standards and deadlines. Plan, estimate, schedule, delegate, and execute tasks to meet project milestones in a multi-project environment. Stay updated with the latest techniques and tools in custom mixed signal layout flows. The Impact You Will Have: Ensure the successful design and development of high-performance analog and mixed signal layouts. Contribute to the overall quality and reliability of our products through meticulous layout design and verification. Help Synopsys maintain its leadership in the semiconductor industry by delivering cutting-edge technology solutions. Support cross-functional teams in achieving project goals and milestones. Enhance the efficiency and effectiveness of our layout design processes through continuous improvement. Drive innovation and excellence in layout design, contributing to the advancement of our technology offerings. What You’ll Need: Bachelor's or Master's degree in Electrical Engineering or a related field. Minimum 6+ years of experience in Analog and Mixed Signal Circuit Layout. Experience with Analog Layout Flow from Device placement to GDS release. Strong knowledge of Electrical and Electronic fundamentals, Semiconductor device physics, CMOS, and FINFET technologies. Proficiency in EDA tools for custom mixed signal layout flows. Who You Are: Self-directed and detail-oriented with excellent problem-solving skills. Effective communicator with the ability to collaborate with cross-functional teams. Passionate about learning and exploring new techniques. Capable of planning, estimating, scheduling, and executing tasks in a multi-project environment. Knowledgeable about electro migration, reliability concepts, ESD/LUP concepts, and their application in layout design. The Team You’ll Be A Part Of: You will be a part of a dynamic and innovative team focused on the design and development of high-performance analog and mixed signal layouts. Our team collaborates closely with cross-functional teams to deliver cutting-edge technology solutions that meet the highest quality standards. Together, we drive the continuous improvement of our layout design processes and contribute to the advancement of Synopsys' technology offerings. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Responsibilities Work closely with Test Engineers to develop various test hardware to support new product release and various engineering projects-20% Create schematic based on any drawings format: schematic software, hand drawings, etc.-20% Place and route components ensuring that all electrical and physical specifications meet the specific design requirements for each PCB design-20% Create fabrication and assembly drawings, parts list, incorporate changes to existing design documentation and create and maintain component library for schematic and footprint-15% Suggest options when faced with challenging PCB design situations including resolutions to non-standard problems-15% Develop and refine team processes for PCB design, part creation, and library/database standard-10% Minimum Qualifications Minimum an associate degree in Electronics Engineering Technology Minimum 10 years of experience in PCB design Proficient in schematic capture and layout generation using Altium Designer software Good understanding of electrical circuits and components behavior and their parasitic elements and interaction Solid knowledge of signal integrity and design for manufacture rules Experience with a variety of board types, including high density and high layer count (greater than 16) digital designs, power electronics, flex circuits, and RF circuits Thorough understanding of PCB fabrication processes, tolerances, IPC standards Effective verbal and written communication Team player with a strong sense of urgency to meet product requirements on schedule Experience in working with international and cross-functional teams Strong interest in or already have experience in mentorship and team leadership Proficiency in Microsoft Office™ products - Excel, Word, Visio, Power Point, Project Show more Show less

Job Description In This Role, Your Responsibilities Will Be: Take ownership of the hardware development tasks and deliver without supervision while using their discretion to seek help when necessary. Develop design concepts and select the right components to ensure the design meets agreed upon functionality, reliability and cost expectations. Develop circuit/board design, building prototypes, board bring-up and debugging, enhancement of various IO modules, Communication and CPU cards used in Remote Automation business. Collaborate with multi-functional teams (component engineering, PCB layout, FPGA, software, testing, product management) to ensure overall system requirements are fulfilled with a cost-effective and high-quality approach. Support if any HW issues on the site as well as in manufacturing. Research on new technology trends and apply the opportunities to enhance product performance or to reduce cost. Support any hardware issues on the products reported from the field, as well as from manufacturing or compliance. Make technical presentations to peers and managers on the details of architecture, design, technical risks, etc. Use excellent communication skills to talk to technical architects on complex technical issues. Who You Are You can take Quick and decisive actions in fast-changing, unpredictable situations. You show a tremendous amount of initiative in tough situations; is exceptional at spotting and seizing opportunities. You can deliver messages in a clear, compelling, and concise manner and Adjust to the communication content/style to meet the needs of diverse stakeholders. You like to encourage the expression of diverse ideas and opinions. For This Role, You Will Need: Bachelor's or above in Electrical & Electronics Engineering or equivalent from an accredited college or university. Minimum 5 to 10 years of expertise in the field of Hardware engineering skills, along with the knowledge of agency/compliance requirements. Expertise in measurement and validation methods for hardware design and know-how to use the related instruments, to automate tests wherever necessary. Solid knowledge of electrical and electronics design and manufacturing. Knowledge of the fundamental theory of signal processing, circuit analysis, analog circuits design, and digital circuits design. Proficiency in the ECAD suite of tools, either from Mentor Graphics or Cadence or similar. Knowledge in Signal Integrity and simulations. Should be able to plan and coordinate tasks across multi-functional teams like Firmware, Mechanical, Component Engineering, PCB layout, etc. Should be able to take ownership of the complete electronics design life-cycle: from requirement to release for production. Preferred Qualifications that Set You Apart: Knowledge and experience in working with the hardware design as per IEC 61508 – functional safety. Hands-on experience in working on the failure analysis and estimation tools such as FMEDA, HAZOP, Fault Tree Analysis Our Culture & Commitment to You At Emerson, we prioritize a workplace where every employee is valued, respected, and empowered to grow. We foster an environment that encourages innovation, collaboration, and diverse perspectives—because we know that great ideas come from great teams. Our commitment to ongoing career development and growing an inclusive culture ensures you have the support to thrive. Whether through mentorship, training, or leadership opportunities, we invest in your success so you can make a lasting impact. We believe diverse teams, working together are key to driving growth and delivering business results. We recognize the importance of employee wellbeing. We prioritize providing competitive benefits plans, a variety of medical insurance plans, Employee Assistance Program, employee resource groups, recognition, and much more. Our culture offers flexible time off plans, including paid parental leave (maternal and paternal), vacation and holiday leave. Show more Show less