Principal DFT Manager

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.

As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Artificial Intelligence SOC team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.

We are looking for a Principal DFT Manager to join the team.

• Excellent debug skills for RTL and gate level simulations

• Experience in DFT scan insertion and or Custom Memory BIST design and verification.

• Experience with Siemens DFT tools.

• Lead DFT strategy and execution across multiple projects, ensuring alignment with overall chip design goals.

• Define and implement DFT architecture, including scan insertion, boundary scan, MBIST, and JTAG.

• Collaborate with RTL, physical design, and verification teams to integrate DFT features seamlessly.

• Manage ATPG and pattern generation, ensuring high fault coverage and test efficiency.

• Oversee post-silicon bring-up and debug, including test program development and failure analysis.

• Drive tool and flow development for DFT automation and optimization.

• Ensure compliance with manufacturing test requirements, including support for ATE platforms.

• Mentor and guide DFT engineers, fostering technical growth and best practices.

• Track project milestones and deliverables, reporting status and risks to leadership.

• Evaluate emerging DFT methodologies and tools, recommending improvements to enhance test quality and productivity.