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Principal ASIC Digital Verification EngineerIP Development

Principal ASIC Digital Verification EngineerIP Development

Synopsys

6 - 11 years

20 - 25 Lacs

bengaluru

Posted:1 day ago| Platform:

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Skills Required

vmm system verilog protocols uvm object

Work Mode

Work from Office

Job Type

Full Time

Job Description

We are looking for a highly skilled and experienced Principal ASIC Digital Verification Engineer to join our team at Synopsys (India) Private Limited. The ideal candidate will have a strong background in digital verification and IP development, with 10-15 years of experience.

Roles and Responsibility

Develop and implement comprehensive verification plans for complex ASIC designs.
Lead the design verification team to ensure successful project delivery.
Collaborate with cross-functional teams to identify and resolve technical issues.
Create and maintain detailed documentation of verification environments and testbenches.
Analyze and debug complex verification failures to improve overall design quality.
Mentor junior engineers to enhance their skills and knowledge.

Job Requirements

Strong understanding of digital design principles and methodologies.
Experience with verification tools such as Verilog, SystemVerilog, and UVM.
Excellent problem-solving skills and attention to detail.
Ability to work effectively in a team environment and lead others.
Strong communication and interpersonal skills.
Familiarity with industry-standard protocols and standards.

Disclaimer: This job description has been sourced from a public domain and may have been modified by Naukri.com to improve clarity for our users. We encourage job seekers to verify all details directly with the employer via their official channels before applying.

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Principal ASIC Digital Verification EngineerIP Development