Physical Design Engineer

Role: Physical Design Engineer

Physical Design Engineer

Key Responsibilities:

• Execute

  Floorplanning, Placement, CTS, Routing, and Timing Closure

  for block and chip-level designs.
• Perform

  Synthesis, DFT insertion, and ECO implementation

  as required.
• Work closely with front-end, STA, and DFT teams to achieve signoff-quality results.
  
• Conduct

  Power and IR drop analysis, DRC/LVS

  checks, and ensure clean tapeout.
• Handle multiple

  technology nodes (e.g., 5nm, 7nm, 12nm, 16nm, 28nm)

  and tool flows.
• Drive

  LEC checks

  ,

  timing ECOs

  , and convergence of design closure metrics.

Required Skills & Experience:

• 3+ years

  of experience in Physical Design (Block or Full Chip).
• Hands-on expertise with

  ICC2 / Innovus / Fusion Compiler / PrimeTime / Voltus / Redhawk

  tools.
• Strong understanding of

  timing, power, and congestion

  analysis.
• Experience in

  Advanced Nodes (16nm)

  preferred.
• Solid knowledge of

  Static Timing Analysis (STA)

  and

  Synthesis

  flow.
• Excellent debugging and analytical skills.