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5 - 10 years
20.0 - 35.0 Lacs P.A.
Chennai, Pune, Bangalore Rural
Posted:Invalid date| Platform: 
Work from Office
Full Time
Design Verification Engineer In-House ODC Project We are looking for an experienced Design Verification Engineer to be part of our in-house ODC project . The ideal candidate will be an individual contributor with expertise in SoC, Subsystem, or IP verification using high-speed serial protocols and advanced protocols . The candidate should have a strong command of SystemVerilog (SV) and UVM , including writing test cases, sequences, OOPs concepts, and UPF implementation . The role requires hands-on experience in scratch-level work , ensuring verification coverage from the ground up. Experience: 4 to 20+ years Location: Bangalore, Chennai, Pune Notice Period: Immediate to 30 days If you are interested please share your updated CV chandana.l@acldigital.com
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