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Best NanoTech
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Design Verification Engineer

Design Verification Engineer

Best NanoTech

5 years

0 Lacs

bengaluru karnataka india

Posted:1 day ago| Platform:

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Skills Required

design verification ip test analyze architecture simulations integration systemverilog power scripting perl tcl

Work Mode

On-site

Job Type

Full Time

Job Description

Job Title:

Location:

Notice Period:

Experience:

About the Role

Design Verification (DV) Engineer

Key Responsibilities

Work on IP and SoC level verification using industry-standard methodologies.
Develop, maintain and execute verification test plans and environments.
Debug failures, analyze root causes, and collaborate with design and architecture teams for closure.
Run simulations, analyze results, and achieve coverage closure for assigned blocks and SoC features.
Participate in feature integration, regressions, and validation cycles across the verification workflow.

Required Skills & Expertise

✔ Strong knowledge of digital design with IP / SoC level verification

SystemVerilog, UVM/OVM/SystemC

Verilog

ARM/DSP CPU architecture

High-Speed Peripherals:

Power-aware Verification, GLS, Test Vector Generation

ClearCase / Perforce

Perl, TCL or Python

Regards

Anil Sheoran

anil@bestnanotech.in

9813621334

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