Design Implementation Engineer, Senior

As a Qualcomm Hardware Engineer, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems. This includes bringing up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. Key Responsibilities: - Strong understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools. - Experience with writing timing constraints for synthesis, STA, timing closure, and pipelining at different levels for performance optimization and timing closure. - Experience in all aspects of timing closure for multi-clock domain designs. - Familiarity with MCMM synthesis and optimization. - Good understanding of low-power design implementation using UPF. - Experience with scripting languages such as Perl/Python, TCL. - Experience with different power optimization flows or techniques such as clock gating. - Ability to work independently with design, DFT, and PD team for netlist delivery, timing constraints validation. - Capability to handle ECOs and formal verification and maintain high-quality matrix. Qualifications Required: - Minimum of 6+ years of experience. (Note: No additional details of the company were provided in the job description),