Posted:2 months ago| Platform:
Remote
Full Time
Analog Design and Verification I/O Library cells Follow Up Description: Development, implementation and verification of analog full custom circuit designs Development of architecture and circuit concepts under consideration of e.g. DfT, ESD, ... Dimensioning, simulation and optimization of circuits Functional and electrical verification of circuits (with automated test benches) Post layout verification/simulation (parasitics, I/R drop, current analysis, ...)
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15.0 - 30.0 Lacs P.A.
2.4 - 4.2 Lacs P.A.
Experience: Not specified
3.0 - 8.0 Lacs P.A.
3.0 - 6.0 Lacs P.A.
5.0 - 9.0 Lacs P.A.
1.0 - 2.0 Lacs P.A.
2.75 - 3.0 Lacs P.A.
6.0 - 10.0 Lacs P.A.
8.0 - 13.0 Lacs P.A.
2.0 - 6.0 Lacs P.A.